參數(shù)資料
型號： NLAST9431
廠商： ON SEMICONDUCTOR
英文描述： Low Voltage Single Supply Dual DPDT Analog Switch(低壓單電源，雙DPDT模擬開關)
中文描述： 低電壓單電源雙DPDT模擬開關（低壓單電源，雙雙刀雙擲模擬開關）
文件頁數(shù)： 7/11頁
文件大小： 101K
代理商： NLAST9431
NLAST9431
http://onsemi.com
7
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. V
ISO
, Bandwidth and V
ONL
are independent of the input signal direction.
VOUT
V
ISO
= Off Channel Isolation = 20 Log VIN
IN
at 100 kHz
V
ONL
= On Channel Loss = 20 Log VIN
IN
at 100 kHz to 50 MHz
Bandwidth (BW) = the frequency 3 dB below V
ONL
V
CT
= Use V
ISO
setup and test to all other switch analog input/outputs terminated with 50
Output
DUT
Input
50
50
Generator
Reference
Transmitted
Figure 7. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/V
ONL
50
Off
On
Off
V
OUT
V
CC
GND
Output
V
IN
C
L
DUT
Figure 8. Charge Injection: (Q)
V
IN
Open
Output
55
20
L
Figure 9. Switch Leakage vs. Temperature
1
I
NO(OFF)
TEMPERATURE (
°
C)
0.01
25
0.001
0.1
70
85
125
I
COM(ON)
I
COM(OFF)
V
CC
= 5.0 V
10
100
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相關代理商/技術參數(shù)
參數(shù)描述
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