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參數(shù)資料
| 型號(hào)： | NLAS4157 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | SPDT, 1 RON Switch |
| 中文描述： | 單刀雙擲，1列伊開(kāi)關(guān) |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大?。?/td> | 81K |
| 代理商： | NLAS4157 |
NLAS4157
http://onsemi.com
3
DC ELECTRICAL CHARACTERISTICS
V
CC
(V)
T
A
= +25
°
C
T
A
= 40
°
C to +85
°
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Min
Max
Unit
V
IH
HIGH Level
Input Voltage
2.7
4.5
2.0
2.4
V
V
IL
LOW Level
Input Voltage
2.7
4.5
0.6
0.8
V
I
IN
Input Leakage Current
0
V
IN
5.5 V
05.5
±
0.1
±
1
A
I
OFF
OFF State Leakage
Current (Note 7)
0
A, B
V
CC
5.5
2.0
+2.0
±
20
nA
I
ON
ON State Leakage
Current (Note 7)
0
A, B
V
CC
5.5
4.0
+4.0
±
40
nA
R
ON
Switch On Resistance
(Note 2)
I
O
= 100 mA,
B
0
or B
1
= 3.5 V
2.7
2.0
4.0
4.3
I
O
= 100 mA,
B
0
or B
1
= 1.5 V
4.5
0.8
1.15
1.3
I
CC
Quiescent Supply
Current
All Channels ON or OFF
V
IN
= V
CC
or GND, I
OUT
= 0
5.5
0.5
1.0
A
Analog Signal Range
R
ON
On Resistance Match
Between Channels
(Notes 2, 3, 4)
I
A
= 100 mA,
B
0
or B
1
= 1.5 V
I
A
= 100 mA,
B
0
or B
1
= 3.5 V
2.7
4.5
0.15
0.12
0.15
R
flat
On Resistance
Flatness (Notes 2, 3, 5)
I
A
= 100 mA,
B
0
or B
= 0 V, 0.75 V, 1.5 V
I
A
= 100 mA,
B
0
or B
1
= 0 V, 1.0 V, 2.0 V
2.7
4.5
1.4
0.3
0.4
2. Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower
of the voltages on the two (A or B Ports).
3. Parameter is characterized but not tested in production.
4.
D
R
= R
max R
min measured at identical V
, temperature and voltage levels.
5. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions.
6. Guaranteed by Design.
7. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On
Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
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