參數(shù)資料
型號(hào): NLAS4053DTG
廠商: ON Semiconductor
文件頁數(shù): 1/14頁
文件大?。?/td> 0K
描述: IC MUX/DEMUX TRIPLE 2X1 16TSSOP
標(biāo)準(zhǔn)包裝: 96
功能: 多路復(fù)用器/多路分解器
電路: 3 x 2:1
導(dǎo)通狀態(tài)電阻: 33 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 3 V ~ 5 V,±3 V
電流 - 電源: 40µA
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
Semiconductor Components Industries, LLC, 2011
March, 2011 Rev. 3
1
Publication Order Number:
NLAS4053/D
NLAS4053
Analog Multiplexer/
Demultiplexer
Triple 2:1 Analog SwitchMultiplexer
Improved Process, SubMicron Silicon
Gate CMOS
The NLAS4053 is an improved version of the MC14053 and
MC74HC4053 fabricated in submicron Silicon Gate CMOS
technology for lower RDS(on) resistance and improved linearity with
low current. This device may be operated either with a single supply or
dual supply up to
±3.0 V to pass a 6 VPP signal without coupling
capacitors.
When operating in single supply mode, it is only necessary to tie
VEE, pin 7 to ground. For dual supply operation, VEE is tied to a
negative voltage, not to exceed maximum ratings. Pin for pin
compatible with all industry standard versions of ‘4053.’
Features
Improved RDS(on) Specifications
Pin for Pin Replacement for MAX4053 and MAX4053A
One Half the Resistance Operating at 5.0 Volts
Single or Dual Supply Operation
Single 35 Volt Operation, or Dual
±3.0 Volt Operation
With VCC of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,
No Translators Needed
Address and Inhibit Pins are OverVoltage Tolerant and May Be
Driven Up +6.0 V Regardless of VCC
Greatly Improved Noise Margin Over MAX4053 and MAX4053A
Improved Linearity Over Standard HC4053 Devices
Popular SOIC and the Space Saving TSSOP Packages
PbFree Packages are Available*
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
MARKING
DIAGRAMS
TSSOP16
DT SUFFIX
CASE 948F
SOIC16
D SUFFIX
CASE 751B
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
NLAS4053G
AWLYWW
NLAS
4053
ALYWG
G
1
16
1
16
A
= Assembly Location
L, WL
= Wafer Lot
Y
= Year
W, WW = Work Week
G
= PbFree Package
G
= PbFree Package
(Note: Microdot may be in either location)
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