參數(shù)資料
型號(hào): NL27WZ125USG
廠商: ON Semiconductor
文件頁(yè)數(shù): 1/5頁(yè)
文件大?。?/td> 0K
描述: IC BUFFER DL TRI-ST NON-INV US8
標(biāo)準(zhǔn)包裝: 1
系列: 27WZ
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 2
每個(gè)元件的位元數(shù): 1
輸出電流高,低: 32mA,32mA
電源電壓: 1.65 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-VFSOP(0.091",2.30mm 寬)
供應(yīng)商設(shè)備封裝: US8
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 1126 (CN2011-ZH PDF)
其它名稱: NL27WZ125USGOSDKR
Semiconductor Components Industries, LLC, 2014
March, 2014 Rev. 10
1
Publication Order Number:
NL27WZ125/D
NL27WZ125
Dual Buffer with 3-State
Outputs
The NL27WZ125 is a high performance dual noninverting buffer
operating from a 1.65 V to 5.5 V supply.
Features
Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5 V
Designed for 1.65 V to 5.5 V VCC Operation
Over Voltage Tolerant Inputs and Outputs
LVTTL Compatible Interface Capability With 5 V TTL Logic with
VCC = 3 V
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
3State OE Input is ActiveLow
Replacement for NC7WZ125
Chip Complexity = 72 FETs
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
These Devices are PbFree and are RoHS Compliant
A2
Y2
EN
Figure 1. Pinout (Top View)
Figure 2. Logic Symbol
1
Y1
A1
OE2
OE1
VCC
OE1
A1
GND
1
2
3
8
7
6
45
Y2
OE2
Y1
A2
http://onsemi.com
MARKING
DIAGRAM
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
PIN ASSIGNMENT
Pin
1
2
3
4
5
6
7
8
Function
OE1
A1
Y2
GND
A2
Y1
OE2
VCC
Input
FUNCTION TABLE
An
L
H
X
Output
Yn
L
H
Z
OEn
L
H
X = Don’t Care
n = 1, 2
US8
US SUFFIX
CASE 493
1
8
M0
= Device Code
M
= Date Code*
G
= PbFree Package
M0 M G
G
*Date Code orientation may vary depending upon
manufacturing location.
(Note: Microdot may be in either location)
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