參數(shù)資料
型號: NJW1504V
廠商: New Japan Radio Co., Ltd.
英文描述: PLL Synthesizer with IC Bus for TV Tuner
中文描述: PLL合成器的電視調諧器集成電路總線
文件頁數(shù): 5/10頁
文件大?。?/td> 135K
代理商: NJW1504V
NJW1504/1508
- 5 -
n
I
2
C bus Protocols
The input information, which consists of chip address and next two or four byte data, is received by I
2
C bus
receiver. The allowable I
2
C bus protocols are as follows.
(1) STA CA CB BB STO
(2) STA CA D1 D2 STO
(3) STA CA CB BB D1 D2 STO
(4) STA CA D1 D2 CB BB STO
STA: Start Condition
STO: Stop Condition
CA: Chip Address
CB: Control Byte
BB: Band switch Byte
D1: Divider Byte 1
D2: Divider Byte 2
For suitable circuit operation,5-byte data should have chip address, 2-byte control data, band data, and 2-byte
divider byte. Following chip address. 2-byte data is received. For distinction of each data, first and third data
byte has a function bit. As function bit, divider byte has “1” and control/band data has “0”.
SDA
1-7
9
SCL
STA
A D D R E S S
R/W
1-7
A C K
DATA
8
8
9
9
A C K
A C K
S T O
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