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參數(shù)資料
| 型號： | NJ88C24 |
| 廠商： | Zarlink Semiconductor Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Frequency Synthesiser with non-resettable counters |
| 中文描述： | 頻率合成器與非復(fù)位計數(shù)器 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 126K |
| 代理商： | NJ88C24 |
DS2438 - 2.3
NJ88C24
Frequency Synthesiser with non-resettable counters
T
he NJ88C24 is a synthesiser circuit fabricated on the GPS
CMOS process and is capable of achieving high sideband
attenuation and low noise performance. It contains a reference
oscillator, 11-bit programmable reference divider, digital and
sample-and-hold comparators, 10-bit programmable ‘M’ counter,
7-bit programmable ‘A’ counter and the necessary control and
latch circuitry for accepting and latching the input data.
Data is presented serially under external control from a
suitable microprocessor. Although 28 bits of data are initially
required to program all counters, subsequent updating can be
abbreviated to 17 bits, when only the ‘A’ and‘M’ counters require
changing.
The NJ88C24 is intended to be used in conjunction with a
two-modulus prescaler such as the SP8710 or SP8705 series
to produce a universal binary coded synthesiser for up to
1100MHz operation.
FEATURES
I
Low Power Consumption
I
High Performance Sample and Hold Phase Detector
I
Serial Input with Fast Update Feature
I
>20MHz Input Frequency
I
Fast Lock-up Time
Fig.1 Pin connections - top view (not to scale)
DG16, DP16
MP18
Fig.2 Block diagram
7 (9)
8 (10)
10 (12)
12 (14)
11 (13)
4 (5)
6 (7)
5 (6)
OSC IN
OSC OUT
DATA
ENABLE
CLOCK
F
IN
V
DD
V
SS
REFERENCE COUNTER
(11BITS)
LATCH 6
LATCH 7
LATCH 8
LATCH 1
LATCH 2
LATCH 3
‘M’ COUNTER
(10 BITS)
‘M’ REGISTER
‘R’ REGISTER
CONTROL LOGIC
LATCH 4
LATCH 5
‘A’ COUNTER
(7 BITS)
‘A’ REGISTER
4
2
SAMPLE
/
HOLD
PHASE
DETECTOR
FREQUENCY
/
PHASE
DETECTOR
V
SS
PDA
PDB
LOCK DETECT (LD)
MODULUS
CONTROL
OUTPUT (MC)
1 (1)
2 (2)
3 (4)
14 (16)
RB CAP CH
15 17 16
(17) (15) (18)
f
r
f
V
ORDERING INFORMATION
NJ88C24 MA DG
Ceramic DIL Package
NJ88C24 MA
DP
Plastic DIL Package
NJ88C24 MA MP
Miniature Plastic DIL Package
2
0·5V to 7V
7V
V
SS
2
0·3V to V
DD
1
0·3V
2
55
°
C to
1
125
°
C
(DP and MP packages)
2
65
°
C to
1
150
°
C
(DG package)
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V
DD
2
V
SS
:
Input voltage
Open drain output, LD pin:
All other pins:
Storage temperature:
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
NJ88C24
PDA
PDB
NC
LD
F
IN
V
SS
V
DD
NC
OSC IN
CH
RB
MC
CAP
ENABLE
CLOCK
DATA
NC
OSC OUT
CH
RB
MC
CAP
ENABLE
CLOCK
DATA
NC
PDA
PDB
LD
FIN
V
SS
V
DD
OSC IN
OSC OUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NJ88C24
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PDF描述 |
|---|---|
| NJ88C24MADG | Frequency Synthesiser with non-resettable counters |
| NJ88C24MADP | Frequency Synthesiser with non-resettable counters |
| NJ88C24MAMP | Frequency Synthesiser with non-resettable counters |
| NJ88C25 | FREQUENCY SYNTHESISER (MICROPROCESSOR SERIAL INTERFACE) |
| NJ88C25KADG | FREQUENCY SYNTHESISER (MICROPROCESSOR SERIAL INTERFACE) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NJ88C24MADG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Frequency Synthesiser with non-resettable counters |
| NJ88C24MADP | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Frequency Synthesiser with non-resettable counters |
| NJ88C24MAMP | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Frequency Synthesiser with non-resettable counters |
| NJ88C24MAMPTF | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Zarlink Semiconductor Inc 功能描述: |
| NJ88C25 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:FREQUENCY SYNTHESISER (MICROPROCESSOR SERIAL INTERFACE) |
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