參數(shù)資料
型號: NE592N8G
廠商: ON Semiconductor
文件頁數(shù): 1/12頁
文件大?。?/td> 0K
描述: IC AMP VIDEO 2STAGE DIFF 8-DIP
標準包裝: 50
應用: 通用
輸出類型: 差分
電路數(shù): 1
電流 - 電源: 18mA
電流 - 輸出 / 通道: 10mA
電壓 - 電源,單路/雙路(±): ±3 V ~ 8 V
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應商設備封裝: 8-PDIP
包裝: 管件
其它名稱: NE592N8G-ND
NE592N8GOS
Semiconductor Components Industries, LLC, 2006
October, 2006 Rev. 4
1
Publication Order Number:
NE592/D
NE592
Video Amplifier
The NE592 is a monolithic, two-stage, differential output,
wideband video amplifier. It offers fixed gains of 100 and 400
without external components and adjustable gains from 400 to 0 with
one external resistor. The input stage has been designed so that with
the addition of a few external reactive elements between the gain
select terminals, the circuit can function as a high-pass, low-pass, or
band-pass filter. This feature makes the circuit ideal for use as a
video or pulse amplifier in communications, magnetic memories,
display, video recorder systems, and floppy disk head amplifiers.
Now available in an 8-pin version with fixed gain of 400 without
external components and adjustable gain from 400 to 0 with one
external resistor.
Features
120 MHz Unity Gain Bandwidth
Adjustable Gains from 0 to 400
Adjustable Pass Band
No Frequency Compensation Required
Wave Shaping with Minimal External Components
MIL-STD Processing Available
PbFree Packages are Available
Applications
Floppy Disk Head Amplifier
Video Amplifier
Pulse Amplifier in Communications
Magnetic Memory
Video Recorder Systems
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
SOIC8
D SUFFIX
CASE 751
PDIP8
N SUFFIX
CASE 626
1
8
1
8
MARKING
DIAGRAMS
NE592N8
AWL
YYWWG
A
= Assembly Location
L, WL = Wafer Lot
Y, YY
= Year
W, WW = Work Week
G or G = PbFree Package
http://onsemi.com
NE592
ALYW
G
1
SOIC14
D SUFFIX
CASE 751A
1
PDIP14
N SUFFIX
CASE 646
1
NE592D14G
AWLYWW
1
NE592N14
AWLYYWWG
1
14
+V
Q6
OUTPUT 1
OUTPUT 2
R1
R2
R8
R10
R9
Q5
Q4
Q3
R11
R12
Q11
Q10
R13
R14
R16
R15
R7B
R7A
Q7B
Q8
Q9
Q7A
G2A
G1A
INPUT 1
INPUT 2
R3
R5
G1B
G2B
Q1
Q2
-V
Figure 1. Block Diagram
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