
NCV42642
http://onsemi.com
6
Circuit Description
The NCV42642 is functionally and pin for pin
compatible with NCV4264 with a lower quiescent current
consumption. Its output stage supplies 150 mA with
2.0% output voltage accuracy.
Maximum dropout voltage is 500 mV at 100 mA load
current. It is internally protected against 60 V input
transients, input supply reversal, output overcurrent faults,
and excess die temperature. No external components are
required to enable these features.
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (V
OUT
) and drives the base of
a PNP series pass transistor by a buffer. The reference is a
bandgap design to give it a temperaturestable output.
Saturation control of the PNP is a function of the load
current and input voltage. Oversaturation of the output
power device is prevented, and quiescent current in the
ground pin is minimized.
Regulator Stability Considerations
The input capacitor C
I1
in Figure 2 is necessary for
compensating input line reactance. Possible oscillations
caused by input inductance and input capacitance can be
damped by using a resistor of approximately 1 in series
with C
I2
. The output or compensation capacitor, C
OUT
helps determine three main characteristics of a linear
regulator: startup delay, load transient response and loop
stability. The capacitor value and type should be based on
cost, availability, size and temperature constraints. The
aluminum electrolytic capacitor is the least expensive
solution, but, if the circuit operates at low temperatures
(25
°
C to 40
°
C), both the value and ESR of the capacitor
will vary considerably. The capacitor manufacturer’s data
sheet usually provides this information. The value for the
output capacitor C
OUT
shown in Figure 2 should work for
most applications; however, it is not necessarily the
optimized solution. Stability is guaranteed at values
C
Q
10 F and an ESR
temperature range. Actual limits are shown in a graph in the
Typical Performance Characteristics section.
9
within the operating
Calculating Power Dissipation in a Single Output
Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 3) is:
PD(max)
VIN(max)
VOUT(min)* IQ(max)
VI(max)* IQ
(eq. 1)
Where:
V
IN(max)
is the maximum input voltage,
V
OUT(min)
is the minimum output voltage,
I
Q(max)
is the maximum output current for the
application, and I
Q
is the quiescent current the regulator
consumes at I
Q(max)
. Once the value of P
D(max)
is known,
the maximum permissible value of R
JA
can be calculated:
(150
°
C
TA)
PD
The value of R
JA
can then be compared with those in the
package section of the data sheet. Those packages with
R
JA
’s less than the calculated value in Equation 2 will
keep the die temperature below 150
°
C. In some cases, none
of the packages will be sufficient to dissipate the heat
generated by the IC, and an external heat sink will be
required. The current flow and voltages are shown in the
Measurement Circuit Diagram.
PJA
(eq. 2)
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air. Each material in the heat flow path
between the IC and the outside environment will have a
thermal resistance. Like series electrical resistances, these
resistances are summed to determine the value of R
JA
:
RJA
RJC
RCS
RSA
(eq. 3)
Where:
R
JC
= the junctiontocase thermal resistance,
R
CS
= the casetoheat sink thermal resistance, and
R
SA
= the heat sinktoambient thermal resistance.
R
JA
appears in the package section of the data sheet.
Like R
JA
, it too is a function of package type. R
CS
and
R
SA
are functions of the package type, heat sink and the
interface between them. These values appear in data sheets
of heat sink manufacturers. Thermal, mounting, and heat
sinking are discussed in the ON Semiconductor application
note AN1040/D, available on the ON Semiconductor
Website.