參數(shù)資料
型號： NCP5501DT15RKG
廠商： ON SEMICONDUCTOR
元件分類： 基準(zhǔn)電壓源/電流源
英文描述： 500 mA Linear Regulator
中文描述： 1.5 V FIXED POSITIVE LDO REGULATOR, 1.073 V DROPOUT, PSSO2
封裝： LEAD FREE, PLASTIC, DPAK-3
文件頁數(shù)： 4/9頁
文件大?。?/td> 143K
代理商： NCP5501DT15RKG
NCP5500, NCV5500, NCP5501, NCV5501
http://onsemi.com
4
ELECTRICAL CHARACTERISTICS
V
IN
= 2.5 V or (V
OUT
+ 1.0 V), whichever is higher, C
O
= 4.7 F,
40
°
C < T
A
< 85
°
C (<125
°
C for
NCV versions), T
J
< 150
°
C unless otherwise noted.
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
OUTPUT
Output Voltage (Note 6)
Fixed Output Versions
Adjustable Voltage Versions
V
OUT
T
A
= 25
°
C, I
O
= 50 mA
T
A
= 25
°
C, I
O
= 50 mA
±
2.9%
±
2.9%
V
Output Voltage (Notes 6 and 7)
V
OUT
1.0 mA < I
O
< 500 mA
4.9%
+4.9%
V
Line Regulation (Note 7)
REG
LINE
I
O
= 50 mA
2.5 V or (V
OUT
+ 1.0 V) < V
IN
< 16 V
0.1
1.0
%
Load Regulation (Note 7)
REG
LOAD
1.0 mA < I
O
< 500 mA
0.35
1.0
%
Dropout Voltage
Fixed Output Versions
V
DO
(Note 8)
I
O
= 1.0 mA, V
OUT
=
2%
I
O
= 500 mA, V
OUT
=
2%
20
300
90
700
mV
Dropout Voltage
Adjustable Output Versions
V
(Note 9)
I
O
= 1.0 mA, V
OUT
=
2%
I
O
= 500 mA, V
OUT
=
2%
20
300
90
700
mV
Ground Current
I
GND
I
= 100 A
I
O
= 500 mA (Note 7)
300
10
500
20
A
mA
Quiescent Current in Shutdown
(NCP5500, NCV5500)
Iq
Adjustable and 1.5 V versions
All other versions
30
40
50
50
A
Current Limit
I
OUT(LIM)
V
OUT
= 0 V (Note 7)
500
700
900
mA
Ripple Rejection Ratio
RR
f = 120 Hz
75
dB
Output Noise Voltage (Note 10)
V
n
f = 10 Hz to 100 kHz, V
= 2.5 V
V
OUT
= 1.25 V, I
O
= 1.0 mA
f = 10 Hz to 100 kHz, V
IN
= 2.5 V
V
OUT
= 1.25 V, I
O
= 100 mA
20
34
Vrms
Minimum Output Capacitance /
ESR for Stability
C
OUT
/ ESR
5.0 mA < I
O
< 500 mA
T
A
= 25
°
C
4.7 F / 3
ENABLE
(NCP5500, NCV5500 Only)
Enable Voltage
V
ENoff
V
ENon
OFF (shutdown) State
ON (enabled) State
2.0
0.4
V
Enable Pin Bias Current
I
EN
V
EN
= V
IN
, V
IN
= 2.5 V, I
O
= 1.0 mA
1.0
A
ADJUST
Adjust Pin Current (Note 11)
I
ADJ
V
EN
= V
IN
, V
ADJ
= 1.25 V, V
OUT
= 1.25 V
60
nA
THERMAL SHUTDOWN
Thermal Shutdown Temperature (Note 11)
TSD
I
O
= 100 A
150
210
°
C
6. Deviation from nominal. For adjustable versions, Pin ADJ connected to OUT.
7. Use pulse loading to limit power dissipation (duration < 100 mS and duty cycle < 1%).
8. V
DO
= V
IN
V
OUT
. For <2.5 V versions, V
DO
will be constrained by the minimum input voltage of 2.5 V.
9. V
DO
= V
IN
V
OUT
. For output voltage set to <2.5 V, V
DO
will be constrained by the minimum input voltage.
10.V
n
for other fixed voltage versions, as well as adjustable versions set to other output voltages, can be calculated from the following formula:
V
n
= V
n(x)
* (V
OUT
1.25) / 1.25, where V
n(x)
is the typical value from the table above.
11.Not tested in production. Limits are guaranteed by design.
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