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參數(shù)資料
| 型號(hào)： | NCP1216AD65 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | PWM Current-Mode Controller for High-Power Universal Off-Line Supplies |
| 中文描述： | 0.005 A SWITCHING CONTROLLER, 71.5 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁(yè)數(shù)： | 11/18頁(yè) |
| 文件大?。?/td> | 182K |
| 代理商： | NCP1216AD65 |
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NCP1216, NCP1216A
http://onsemi.com
11
the nominal switching frequency whose sweep is
synchronized with the V
CC
ripple. For instance, with a 2.2 V
peaktopeak ripple, the NCP1216P065 frequency will
equal 65 kHz in the middle of the ripple and will increase as
V
CC
rises or decrease as V
CC
ramps down. Figure 20
portrays the behavior we have adopted:
Figure 20. V
CC
Ripple is Used to Introduce a
Frequency Jittering on the Internal Oscillator
Sawtooth
65 kHz
68 kHz
VCC
OFF
V
CC
Ripple
VCC
ON
62 kHz
Skipping Cycle Mode
The NCP1216 automatically skips switching cycles when
the output power demand drops below a given level. This is
accomplished by monitoring the FB pin. In normal
operation, pin 2 imposes a peak current accordingly to the
load value. If the load demand decreases, the internal loop
asks for less peak current. When this setpoint reaches a
determined level, the IC prevents the current from
decreasing further down and starts to blank the output
pulses: the IC enters the socalled skip cycle mode, also
named controlled burst operation. The power transfer now
depends upon the width of the pulse bunches (Figure 22).
Suppose we have the following component values:
L
p
, primary inductance = 350 H
F
sw
, switching frequency = 65 kHz
I
p
skip = 600 mA (or 333 mV / R
sense
)
The theoretical power transfer is therefore:
1
2
If this IC enters skip cycle mode with a bunch length of
10 ms over a recurrent period of 100 ms, then the total power
transfer is:
4
0.1
400 mW.
Lp
Ip2
Fsw
4 W.
(eq. 8)
(eq. 9)
To better understand how this skip cycle mode takes place,
a look at the operation mode versus the FB level
immediately gives the necessary insight:
Figure 21.
4.2 V, F
B
Pin Open
3.2 V, Upper
Dynamic Range
Normal Current Mode Operation
Skip Cycle Operation
I
pMIN
= 333 mV / R
sense
FB
1 V
When FB is above the skip cycle threshold (1.0 V by
default), the peak current cannot exceed 1.0 V/R
sense
. When
the IC enters the skip cycle mode, the peak current cannot go
below V
pin1
/ 3.3. The user still has the flexibility to alter this
1.0 V by either shunting pin 1 to ground through a resistor
or raising it through a resistor up to the desired level.
Grounding pin 1 permanently invalidates the skip cycle
operation.
Figure 22. Output Pulses at Various Power Levels
(X = 5 s/div) P1 < P2 < P3
Power P1
Power
P2
Power
P3
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