- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10904 > NCN5192MNG (ON Semiconductor)IC HART MODEM CMOS SGL 32QFN PDF資料下載
參數(shù)資料
| 型號： | NCN5192MNG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC HART MODEM CMOS SGL 32QFN |
| 標準包裝： | 1 |
| 系列： | * |
NCN5192
http://onsemi.com
7
Pin Descriptions
Table 8. PIN DESCRIPTIONS
Symbol
Pin Name
Description
AREF
Analog reference voltage
Receiver Reference Voltage. Normally 1.23 V is selected (in combination with VDDA
= 3.3 V). See Table 2.
CDREF
Carrier detect reference voltage
Carrier Detect Reference voltage. The value should be 85 mV below AREF to set
the carrier detection to a nominal of 100 mVpp.
RESETB
Reset digital logic
When at logic low (VSS) this input holds all the digital logic in reset. During normal
operation RESETB should be at VDD.
RTSB
Request to send
Activelow input selects the operation of the modulator. TxA is enabled when this
signal is low. This signal must be held high during powerup.
RxA
Analog receive input
Receive Data Demodulator Input. Accepts a HART 1200 / 2200 Hz FSK modulated
waveform as input.
RxAFI
Analog receive comparator input
Positive input of the carrier detect comparator and the receiver filter comparator.
TxD
Digital transmit input
Input to the modulator accepts digital data in NRZ form. When TxD is low, the modu-
lator output frequency is 2200 Hz. When TxD is high, the modulator output frequency
is 1200 Hz.
XIN
Oscillator input
Input to the internal oscillator must be connected to a parallel mode ceramic resonator
when using the internal oscillator or grounded when using an external clock signal.
XOUT
Oscillator output
Output from the internal oscillator must be connected to an external clock signal or to
a parallel mode ceramic resonator when using the internal oscillator.
CLK1
Programmable Clock Output
Output signal derived from oscillator output, frequency division set by internal register.
CLK2
Programmable Clock Output
Output signal derived from oscillator output, frequency division set by internal register.
As this signal is also used internally, the division should be set so that the output fre-
quency is 460.8 kHz
CBIAS
Comparator bias current
Connection to the external bias resistor. RBIAS should be selected such that AREF /
RBIAS = 2.5 mA ± 5 %
CD
Carrier detect output
Output goes high when a valid input is recognized on RxA. If the received signal is
greater than the threshold specified on CDREF for four cycles of the RxA signal, the
valid input is recognized.
RxAF
Analog receive filter output
The output of the three pole high pass receive data filter
RxD
Digital receive output
Signal outputs the digital receive data. When the received signal (RxA) is 1200 Hz,
RxD outputs logic high. When the received signal (RxA) is 2200 Hz, RxD outputs
logic low. The HART receive data stream is only active if Carrier Detect (CD) is high.
RxD_ENH
Digital receive output, alternative
Not(OCD) or RXD
TxA
Analog transmit output
Transmit Data Modulator Output. A trapezoidal shaped waveform with a frequency of
1200 Hz or 2200 Hz corresponding to a data value of 1 or 0 respectively applied to
TxD. TxA is active when RTSB is low. TxA equals 0.5 V when RTSB is high.
SCLK
SPI bus clock line
Serial communication clock line
DATA
SPI bus data line
Serial communication data line. Frames transmitted can either be 8 bit or 16 bit long.
CS
SPI bus chip select
Serial communication chip select line. Pulled high by microcontroller while a frame is
transmitted.
JUMP
DAC Alarm value
When a problem is detected, such as a clock failure or the watchdog going off, the
DAC will jump to VSS or DACREF, depending on whether this pin is connected to
VSS or VDD respectively.
DACREF
DAC Reference
This is the high value of the output and can be connected to any voltage between
AREF and VDD.
DAC
DAC Output
Output of a 16 bit SigmaDelta Modulator
KICK
Watchdog Kick
Periodically a pulse should be provided to reset the watchdog. This can be configured
in internal registers for an internal 1.8kHz signal, or to an external signal provided to
this pin.
VPOR
POR Input
Input to the POR comparator. The voltage on this pin is compared with AREF. An
external resistor divider should divide the supply voltage to this pin.
VDD
Digital power
Power for the digital modem circuitry
VDDA
Analog supply voltage
Power for the analog modem circuitry
VSS
Ground
Digital ground
VSSA
Analog ground
相關PDF資料 |
PDF描述 |
|---|---|
| VI-2N4-IX-F2 | CONVERTER MOD DC/DC 48V 75W |
| VI-26D-CV | CONVERTER MOD DC/DC 85V 150W |
| VI-2N4-IX-F1 | CONVERTER MOD DC/DC 48V 75W |
| VI-264-CV | CONVERTER MOD DC/DC 48V 150W |
| MT5656RJ-92.R3 | MODEM RJ-11 V.92 SRL DATA 5V |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| NCN5192MNRG | 功能描述:電信線路管理 IC A5191HRTLG HART MODEM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| NCN6000 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Compact Smart Card Interface IC |
| NCN6000/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Compact Smart Card Interface IC |
| NCN6000DTB | 功能描述:輸入/輸出控制器接口集成電路 2.7V POS/ATM Smart RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| NCN6000DTBG | 功能描述:輸入/輸出控制器接口集成電路 2.7V POS/ATM Smart Card Interface RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復。