Table 7. AC CHARACTERISTICS (VDD
參數(shù)資料
型號: NBXDBA015LN1TAG
廠商: ON Semiconductor
文件頁數(shù): 4/6頁
文件大?。?/td> 0K
描述: IC CLK XO 200.0/206.9MHZ 6CLCC
產(chǎn)品培訓模塊: XO Replacement Overview
標準包裝: 1
系列: PureEdge™
類型: 振蕩器 - 晶體
頻率: 200MHz,206.9MHz
電源電壓: 2.97 V ~ 3.63 V
電流 - 電源: 82mA
工作溫度: -40°C ~ 85°C
封裝/外殼: 6-CLCC
包裝: 標準包裝
供應商設(shè)備封裝: 6-CLCC(7x5)
安裝類型: 表面貼裝
其它名稱: NBXDBA015LN1TAGOSDKR
NBXDBA015, NBXDBB015
http://onsemi.com
4
Table 7. AC CHARACTERISTICS (VDD = 3.3 V ± 10%, GND = 0 V, TA = 40°C to +85°C) (Note 3)
Symbol
Characteristic
Conditions
Min.
Typ.
Max.
Units
fCLKOUT
Output Clock Frequency
FSEL = HIGH
206.9
MHz
FSEL = LOW
200
Df
Frequency Stability NBXDBB015*
Frequency Stability NBXDBA015
0°C to +70°C
60°C to +85°C
(Note 4)
±20*
±50
ppm
FNOISE
PhaseNoise Performance
100 Hz of Carrier
102
dBc/Hz
fCLKout = 200 MHz/206.9 MHz
(See Figures 3 and 4)
1 kHz of Carrier
119
dBc/Hz
10 kHz of Carrier
126
dBc/Hz
100 kHz of Carrier
127
dBc/Hz
1 MHz of Carrier
135
dBc/Hz
10 MHz of Carrier
160
dBc/Hz
tjit(F)
RMS Phase Jitter
12 kHz to 20 MHz
0.4
0.9
ps
tjitter
Cycle to Cycle, RMS
1000 Cycles
1.5
8
ps
Cycle to Cycle, PeaktoPeak
1000 Cycles
10
30
ps
Period, RMS
10,000 Cycles
1
4
ps
Period, PeaktoPeak
10,000 Cycles
7
20
ps
tOE/OD
Output Enable/Disable Time
200
ns
tDUTY_CYCLE
Output Clock Duty Cycle
(Measured at Cross Point)
48
50
52
%
tR
Output Rise Time (20% and 80%)
250
400
ps
tF
Output Fall Time (80% and 20%)
250
400
ps
tstart
Startup Time
1
5
ms
Aging
1st Year
3
ppm
Every Year After 1st
1
ppm
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Measurement taken with outputs terminated with 50 ohm to VDD2 V. See Figure 5.
4. Parameter guarantees 10 years of aging. Includes initial stability at 25°C, shock, vibration, and first year aging.
* Please contact sales office for availability
Figure 3. Typical Phase Noise Plot @ 200 MHz
Figure 4. Typical Phase Noise Plot @ 206.9 MHz
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