VCC = 0 V; V
參數(shù)資料
型號: NBSG86ABAEVB
廠商: ON Semiconductor
文件頁數(shù): 2/17頁
文件大小: 0K
描述: BOARD EVAL BBG NBSG86ABA
產(chǎn)品變化通告: Product Discontinuation 21/Jun/2007
標(biāo)準(zhǔn)包裝: 1
主要目的: 邏輯
嵌入式:
已用 IC / 零件: NBSG86A
已供物品:
其它名稱: NBSG86ABAEVB-ND
NBSG86ABAEVBOS
NBSG86A
http://onsemi.com
10
Table 13. AC CHARACTERISTICS
VCC = 0 V; VEE = 3.465 V to 2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V
Symbol
Characteristic
40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fmax
Maximum Input Clock Frequency
(See Figure 7) (Note 26)
7
8
7
8
7
8
GHz
VOUTPP Output Voltage Amplitude
fin v 7 GHz
(OLS = VCC)fin = 8 GHz
590
270
730
440
470
230
720
420
540
180
700
390
mV
tPLH,
tPHL
Propagation Delay to Output Differential
(Figure 16)
D/SEL → Q
110
160
210
115
165
215
120
170
220
ps
tSKEW
Duty Cycle Skew (Note 27)
5
15
5
15
5
15
ps
tSKEW
Channel Skew
Q → D/SEL
5
20
5
20
5
20
ps
tS
SetUp Time (Dx to SEL)
30
ps
tH
HoldUp Time (Dx to SEL)
35
ps
tJITTER
RMS Random Clock Jitter
(See Figure 7) (Note 29)
fin v 7 GHz
PeaktoPeak Data Dependent Jitter
(Note 30)
fin v 7 Gb/s
0.5
12
1.5
0.5
12
1.5
0.5
12
1.5
ps
VINPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 28)
75
2600
75
2600
75
2600
mV
tr
tf
Output Rise/Fall Times (20% 80%)
(Q, Q)
tr
@ 1 GHz
tf
30
17
45
35
60
65
30
17
45
35
60
65
30
17
45
35
60
65
ps
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
26.Measured using a 500 mV source, 50% duty cycle clock source. All loading with 50 W to VCC 2.0 V. Input edge rates 40 ps (20% 80%).
27.tSKEW = |tPLH tPHL| for a nominal 50% differential clock input waveform. See Figure 16.
28.VINPP (max) cannot exceed VCC VEE.
29.Additive RMS jitter with 50% duty cycle clock signal at 7 GHz.
30.Additive PeaktoPeak data dependent jitter with NRZ PRBS 2311 data rate at 7 Gb/s.
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