參數(shù)資料
型號: NBSG16MMNR2
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: 2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
中文描述: LINE TRANSCEIVER, PQCC16
封裝: QFN-16
文件頁數(shù): 2/12頁
文件大小: 81K
代理商: NBSG16MMNR2
NBSG16M
http://onsemi.com
2
V
CC
NC
V
EE
V
EE
V
CC
V
BB
V
EE
V
EE
V
CC
Q
Q
V
CC
VTD
D
D
VTD
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
NBSG16M
Exposed Pad (EP)
Figure 1. QFN16 Pinout
(Top View)
Table 1. PIN DESCRIPTION
Pin
Name
I/O
Description
ááááá
ááááá
2
1
D
V
TD
ááááááááááááááááááááááá
ááááááááááááááááááááááá
LVDS, CML, ECL, LVTTL,
LVCMOS Input
Internal 50 Termination Pin. See Table 2. (Note 3)
Inverted Differential Input (Note 3)
3
D
LVDS, CML, ECL, LVTTL,
LVCMOS Input
Noninverted Differential Input. (Note 3)
4
V
TD
Internal 50 Termination Pin. See Table 2. (Note 3)
5
V
CC
Positive Supply Voltage. All V
CC
pins must be externally connected to Power Supply to guar-
antee proper operation.
6
NC
No Connect (Note 1)
7
V
EE
Negative Supply Voltage. All V
EE
pins must be externally connected to Power Supply to guar-
antee proper operation.
8
V
EE
Negative Supply Voltage. All V
EE
pins must be externally connected to Power Supply to guar-
antee proper operation.
9
V
CC
Positive Supply Voltage. All V
CC
pins must be externally connected to Power Supply to guar-
antee proper operation.
10
Q
CML Output
Noninverted CML Differential Output with Internal 50 Source Termination Resistor. (Note 2)
11
Q
CML Output
Inverted CML Differential Output with Internal 50 Source Termination Resistor. (Note 2)
12
V
CC
Positive Supply Voltage. All V
CC
pins must be externally connected to Power Supply to guar-
antee proper operation.
13
V
EE
Negative Supply Voltage. All V
EE
pins must be externally connected to Power Supply to guar-
antee proper operation.
14
V
EE
Negative Supply Voltage. All V
EE
pins must be externally connected to Power Supply to guar-
antee proper operation.
15
V
BB
Internally Generated ECL Reference Output Voltage
16
V
CC
Positive Supply Voltage. All V
CC
pins must be externally connected to Power Supply to guar-
antee proper operation.
EP
Exposed Pad. The thermally exposed pad (EP) on package bottom (see case drawing) must
be attached to a heatsinking conduit.
1. The NC pins are electrically connected to the die and MUST be left open.
2. CML outputs require 50 receiver termination resistor to V
CC
for proper operation.
3. In the differential configuration when the input termination pin (V
TD
, V
TD
) are connected to a common termination voltage, and if no signal
is applied then the device will be susceptible to selfoscillation.
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