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參數(shù)資料
| 型號： | NBC12439 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 3.3V/5V Programmable PLL Synthesized Clock Generator(3.3V/5V可編程PLL合成時鐘發(fā)生器) |
| 中文描述： | 3.3V/5V的可編程鎖相環(huán)路合成時鐘發(fā)生器（3.3V/5V的可編程PLL頻率合成時鐘發(fā)生器） |
| 文件頁數(shù)： | 7/20頁 |
| 文件大小： | 208K |
| 代理商： | NBC12439 |
NBC12439, NBC12439A
http://onsemi.com
7
Table 8. AC CHARACTERISTICS
(V
CC
= 3.135 V to 5.25 V
±
5%; T
A
= 0
°
C to 70
°
C (NBC12439), T
A
= -40
°
C to 85
°
C
(NBC12439A)) (Note 7)
Symbol
Characteristic
Condition
Min
Max
Unit
F
IN
Input Frequency
S_CLOCK
Xtal Oscillator
FREF_EXT (Note 8)
(Note 6)
-
10
10
10
20
100
MHz
F
OUT
Output Frequency
VCO (Internal)
F
OUT
400
50
800
800
MHz
t
LOCK
Maximum PLL Lock Time
10
ms
t
jitter(pd)
Period Jitter (RMS)
(1 )
50 MHz
100 MHz
f
OUT
< 100 MHz
f
OUT
< 800 MHz
8
5
ps
t
jitter(cyc- cyc)
Cycle-to-Cycle Jitter (Peak-to-Peak)
(8 )
50 MHz
100 MHz
f
OUT
< 100 MHz
f
OUT
< 800 MHz
40
20
ps
t
s
Setup Time
S_DATA to S_CLOCK
S_CLOCK to S_LOAD
M, N to P_LOAD
20
20
20
-
-
-
ns
t
h
Hold Time
S_DATA to S_CLOCK
S_CLOCK to S_LOAD
M, N to P_LOAD
20
20
20
-
-
-
ns
tpw
MIN
Minimum Pulse Width
S_LOAD
P_LOAD
50
50
-
-
ns
DCO
Output Duty Cycle
47.5
52.5
%
t
r
, t
f
Output Rise/Fall
FOUT
20%-80%
175
425
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. 10 MHz is the maximum frequency to load the feedback divide registers. S_CLOCK can be switched at higher frequencies when used as
a test clock in TEST_MODE 6.
7. F
OUT
/F
OUT
outputs are terminated through a 50 resistor to V
CC
- 2.0 V. Internal phase detector can handle up to 100 MHz on it's input.
8. Maximum frequency on FREF_EXT is a function of setting the appropriate M counter value, 20
the valid range of 400 MHz
f
VCO
800 MHz. (See Table 11)
9. See applications information section.
M
80, for the VCO to operate within
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NBC12439/D | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V / 5V Programmable PLL Synthesized Clock Generator with Power Down (50 to 800MHz) |
| NBC12439_07 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V/5V Programmable PLL Synthesized Clock Generator |
| NBC12439A | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V/5V Programmable PLL Synthesized Clock Generator |
| NBC12439AFA | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 3.3V/5V Programmable RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| NBC12439AFAG | 功能描述:鎖相環(huán) - PLL 3.3V/5V Programmable PLL Clock Generator RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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