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參數(shù)資料
| 型號(hào)： | NB7L86M |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 2.5V/3.3V 12 Gb/s Differential Clock/Data SmartGate with CML Output and Internal Termination(帶CML輸出和內(nèi)部終端的2.5V/3.3V 12Gb/s差分時(shí)鐘/數(shù)據(jù)智能門極) |
| 中文描述： | 2.5V/3.3V的12 Gb / s的帶CML輸出和內(nèi)部終端（帶白血病輸出和內(nèi)部終端的2.5V/3.3V的12GB的/差分時(shí)鐘/數(shù)據(jù)SmartGate擰差分時(shí)鐘/數(shù)據(jù)智能門極） |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 1454K |
| 代理商： | NB7L86M |
Semiconductor Components Industries, LLC, 2007
July, 2007 - Rev. 4
1
Publication Order Number:
NB7L86M/D
NB7L86M
2.5V/3.3V 12 Gb/s Differential
Clock/Data SmartGate with
CML Output and Internal
Termination
The NB7L86M is a multi-function differential Logic Gate, which
can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1
MUX. This device is part of the GigaComm
family of high
performance Silicon Germanium products. The NB7L86M is an
ultra-low jitter multi-logic gate with a maximum data rate of 12 Gb/s
and input clock frequency of 8 GHz suitable for Data Communication
Systems, Telecom Systems, Fiber Channel, and GigE applications.
Differential inputs incorporate internal 50 termination resistors
and accept LVNECL (Negative ECL), LVPECL (Positive ECL),
LVCMOS, LVTTL, CML, or LVDS. The differential 16 mA CML
output provides matching internal 50
output swing when externally terminated 50 to V
CC
.
The device is housed in a low profile 3x3 mm 16-pin QFN package.
Application notes, models, and support documentation are available
on www.onsemi.com.
Features
Maximum Input Clock Frequency up to 8 GHz
Maximum Input Data Rate up to 12 Gb/s Typical
< 0.5 ps of RMS Clock Jitter
< 10 ps of Data Dependent Jitter
30 ps Typical Rise and Fall Times
90 ps Typical Propagation Delay
2 ps Typical Within Device Skew
Operating Range: V
CC
= 2.375 V to 3.465 V with V
EE
= 0 V
CML Output Level (400 mV Peak-t o-Peak Output) Differential Output
50
Internal Input and Output Termination Resistors
Functionally Compatible with Existing 2.5 V/3.3 V LVEL, LVEP, EP
and SG Devices
Pb-Free Packages are Available
termination, and 400 mV
Figure 1. Simplified Logic Diagram
D0
Q
SEL
VTD0
Q
SEL
VTD0
50
50
D0
D1
VTD1
VTD1
50
50
D1
50
50
VTSEL
http://onsemi.com
QFN16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM
*
16
*For additional marking information, refer to
Application Note AND8002/D.
A
L
Y
W
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
NB7L
86M
ALYW
1
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
ORDERING INFORMATION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NB7L86MMN | 功能描述:邏輯門 2.5V/3.3V Diff Clock RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| NB7L86MMNEVB | 功能描述:BOARD EVAL BBG NB7L86MMN RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:* 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| NB7L86MMNG | 功能描述:邏輯門 2.5V/3.3V Diff Clock Data Smart Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| NB7L86MMNR2 | 功能描述:邏輯門 2.5V/3.3V Diff Clock RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| NB7L86MMNR2G | 功能描述:邏輯門 2.5V/3.3V Diff Clock Data Smart Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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