參數(shù)資料
型號(hào): NB7L216MNR2
廠(chǎng)商: ON Semiconductor
文件頁(yè)數(shù): 1/11頁(yè)
文件大?。?/td> 0K
描述: IC RECEIVER/DRIVER DIFF 16-QFN
標(biāo)準(zhǔn)包裝: 3,000
邏輯類(lèi)型: 差分接收器/驅(qū)動(dòng)器
電源電壓: 2.375 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 16-QFN(3x3)
包裝: 帶卷 (TR)
Semiconductor Components Industries, LLC, 2009
August, 2009 Rev. 5
1
Publication Order Number:
NB7L216/D
NB7L216
2.5V/3.3V, 12Gb/s Multi
Level Clock/Data Input to
RSECL, High Gain
Receiver/Buffer/Translator
with Internal Termination
Description
The NB7L216 is a differential receiver/driver with high gain output
targeted for high frequency applications. The device is functionally
equivalent to the NBSG16 but with much higher gain output. This
highly versatile device provides 35 dB of gain up to 7 GHz.
Inputs incorporate internal 50
W termination resistors and accept
Negative ECL (NECL), Positive ECL (PECL), LVTTL, LVCMOS,
CML, or LVDS. Outputs are Reduced Swing ECL (RSECL), 400 mV.
The VBB pin is an internally generated voltage supply available to
this device only. VBB is used as a reference voltage for singleended
NECL or PECL inputs. For all singleended input conditions, the
unused complementary differential input should be connected to VBB
as a switching reference voltage. VBB may also rebias AC coupled
inputs. When used, decouple VBB via a 0.01 mF capacitor and limit
current sourcing or sinking to 0.5 mA. When not used, VBB output
should be left open.
Application notes, models and support documentation are available
at www.onsemi.com.
Features
High Gain of 35 dB from DC to 7 GHz Typical
High IIP3: 0 dBm Typical
20 mV Minimum Input Voltage Swing
Maximum Input Clock Frequency up to 8.5 GHz
Maximum Input Data Rate up to 12 Gb/s Typical
<0.5 ps of RMS Clock Jitter
<9 ps of Data Dependent Jitter
120 ps Typical Propagation Delay
30 ps Typical Rise and Fall Times
RSPECL Output with Operating Range: VCC = 2.375 V to 3.465 V
with VEE = 0 V
RSNECL Output with RSNECL or NECL Inputs with Operating
Range: VCC = 0 V with VEE = 2.375 V to 3.465 V
RSECL Output Level (400 mV PeaktoPeak Output),
50 W Internal Input Termination Resistors (TemperatureCoefficient
of < 6.38 m
W/°C)
VBB – ECL Reference Voltage Output
PbFree Packages are Available
50 W
VTD
D
VTD
Q
QFN16
MN SUFFIX
CASE 485G
MARKING DIAGRAM*
*For additional marking information, refer to
Application Note AND8002/D.
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= PbFree Package
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
Figure 1. Functional Block Diagram
TIME (17 ps/div)
Figure 2. Typical Output Waveform at
12 Gb/s with PRBS 2231 (VINPP = 400 mV,
Input Signal DDJ = 12 ps)
VOL
TAGE
(60
mV/div)
http://onsemi.com
Device DDJ = 3 ps
(Note: Microdot may be in either location)
1
16
NB7L
216
ALYWG
G
1
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