參數(shù)資料
型號(hào): NB6VQ572MMNG
廠商: ON Semiconductor
文件頁數(shù): 1/11頁
文件大小: 0K
描述: IC CLOCK MUX TRANSLA 4:2 32-QFN
標(biāo)準(zhǔn)包裝: 74
系列: ECLinPS MAX™
類型: 多路復(fù)用器,變換器
電路數(shù): 1
比率 - 輸入:輸出: 4:2
差分 - 輸入:輸出: 是/是
輸入: CML,LVDS,LVPECL
輸出: CML
頻率 - 最大: 5GHz
電源電壓: 1.71 V ~ 2.625 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN(5x5)
包裝: 管件
Semiconductor Components Industries, LLC, 2009
April, 2009 Rev. 0
1
Publication Order Number:
NB6VQ572M/D
NB6VQ572M
1.8V / 2.5V Differential 4:1
Mux w/Input Equalizer to
1:2 CML Clock/Data Fanout /
Translator
MultiLevel Inputs w/ Internal Termination
Description
The NB6VQ572M is a high performance differential 4:1 Clock /
Data input multiplexer and a 1:2 CML Clock / Data fanout buffer that
operates up to 5 GHz / 6.5 Gbps respectively with a 1.8 V or 2.5 V
power supply.
Each INx / INx input pair incorporates a fixed Equalizer Receiver,
which when placed in series with a Clock / Data path, will enhance the
degraded signal transmitted across an FR4 backplane or cable
interconnect. For applications that do not require Equalization,
consider the NB7V572M, which is pincompatible to the
NB6VQ572M.
The differential Clock / Data inputs
have internal 50 W termination
resistors and will accept differential LVPECL, CML, or LVDS logic
levels. The NB6VQ572M incorporates a pair of Select pins that will
choose one of four differential inputs and will produce two identical
CML output copies of Clock or Data.
As such, the NB6VQ572M is ideal for SONET, GigE, Fiber
Channel, Backplane and other Clock/Data distribution applications.
The two differential CML outputs will swing 400 mV when externally
loaded and terminated with a 50
W resistor to VCC and are optimized
for low skew and minimal jitter.
The NB6VQ572M is offered in a low profile 5x5 mm 32pin QFN
PbFree package. Application notes, models, and support
documentation are available at www.onsemi.com. The NB6VQ572M
is a member of the ECLinPS MAX
family of high performance
clock products.
Features
Input Data Rate > 6.5 Gb/s Typical
Data Dependent Jitter < 10 ps
Maximum Input Clock Frequency > 5 GHz Typical
Random Clock Jitter < 0.8 ps RMS
Low Skew 1:2 CML Outputs, < 15 ps max
4:1 MultiLevel Mux Inputs, accepts LVPECL, CML,
LVDS
175 ps Typical Propagation Delay
45 ps Typical Rise and Fall Times
Differential CML Outputs, 400 mV PeaktoPeak,
Typical
Operating Range: VCC = 1.71 V to 2.625 V with GND
= 0 V
Internal 50 W Input Termination Resistors
VREFAC Reference Output
QFN32 Package, 5mm x 5mm, PbFree
40°C to +85°C Ambient Operating Temperature
These are PbFree Devices
QFN32
MN SUFFIX
CASE 488AM
See detailed ordering and shipping information on page 10 of
ORDERING INFORMATION
MARKING
DIAGRAM
http://onsemi.com
32
1
NB6V
Q572M
AWLYYWWG
G
1
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= PbFree Package
(Note: Microdot may be in either location)
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