參數(shù)資料
型號: N74F804D,602
廠商: NXP Semiconductors
文件頁數(shù): 4/8頁
文件大?。?/td> 0K
描述: IC HEX 2-IN NAND DRVR 20-SOIC
標(biāo)準(zhǔn)包裝: 38
系列: 74F
邏輯類型: 與非門
電路數(shù): 6
輸入數(shù): 2
電源電壓: 4.5 V ~ 5.5 V
輸出電流高,低: 48mA,48mA
邏輯電平 - 低: 0.8V
邏輯電平 - 高: 2V
額定電壓和最大 CL 時的最大傳播延遲: 4.5ns @ 5V,50pF
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 20-SO
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 管件
其它名稱: 568-3187-5
933958230602
N74F804D
Philips Semiconductors
Product specification
74F804/1804
Hex 2-input NAND drivers
September 14, 1990
4
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
TA =
–40 to
+85
°C
UNIT
MIN
NOM
MAX
VCC
Supply voltage
4.5
5.0
5.5
V
VIH
High–level input voltage
2.0
V
VIL
Low–level input voltage
0.8
V
IIk
Input clamp current
–18
mA
IOH
High–level output current
–48
mA
IOL
Low–level output current
48
mA
Tamb
Operating free air temperature range
0
+70
°C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS1
LIMITS
UNIT
MIN
TYP2
MAX
VOH
High-level output voltage
VCC = MIN, VIL = MAX
±10%V
CC
2.0
V
VIH = MIN, IOH = MAX
±5%V
CC
2.0
V
VOL
Low-level output voltage
VCC = MIN, VIL = MAX
±10%V
CC
0.38
0.55
V
VIH = MIN, IOL = MAX
±5%V
CC
0.38
0.55
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
-0.73
-1.2
V
II
Input current at maximum input voltage
VCC = MAX, VI = 7.0V
100
A
IIH
High–level input current
VCC = MAX, VI = 2.7V
20
A
IIL
Low–level input current
VCC = MAX, VI = 0.5V
-20
A
IO
Output current3
VCC = MAX
-60
-160
mA
ICC
Supply current (total)
ICCH
VCC = MAX
VIN = GND
2.0
3.0
mA
ICCL
VCC = MAX
VIN = 4.5V
15
20
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. The output conditions have been chosen to produce a current that closely approximates one half of the true short–circuit output current, IOS.
AC ELECTRICAL CHARACTERISTICS
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF,
RL = 500
CL = 50pF,
RL = 500
MIN
TYP
MAX
MIN
MAX
tPLH
tPHL
Propagation delay
Dna, Dnb to Qn
Waveform 1
1.0
2.0
3.0
4.0
4.5
1.0
4.0
5.0
ns
tsk(o)
Output skew1,2
Waveform 2
1.5
ns
NOTES:
1. [tPN actual – tPM actual] for any output compared to any other output where N and M are either LH or HL.
2. Skew times are valid only under same test conditions (temperature, VCC, loading, etc.,).
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