參數(shù)資料
型號: N74F242D,623
廠商: NXP Semiconductors
文件頁數(shù): 6/10頁
文件大?。?/td> 0K
描述: IC BUS TXRX TRI-ST 4BIT 14SOIC
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 2,500
系列: 74F
邏輯類型: 收發(fā)器,反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 4
輸出電流高,低: 15mA,64mA
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SO
包裝: 帶卷 (TR)
其它名稱: 933778220623
N74F242D-T
N74F242D-T-ND
Philips Semiconductors
Product specification
74F242/74F243
Transceivers
1990 Aug 30
5
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS1
MIN
TYP2
MAX
UNIT
VCC = MIN,
VIL = MAX
IO = 3mA
±10%VCC
2.4
V
High level output voltage
VIL = MAX,
VIH = MIN
IOH = –3mA
±5%VCC
2.7
3.3
V
VOH
High-level output voltage
VCC = MIN,
VIL = MAX
I
= 15mA
±10%VCC
2.0
3.2
V
VIL = MAX,
VIH = MIN
IOL = –15mA
±5%VCC
2.0
3.1
V
Low level output voltage
VCC = MIN,
VIL = MAX
I
=MAX
±10%VCC
0.55
V
VOL
Low-level output voltage
VIL = MAX,
VIH = MIN
IOH=MAX
±5%VCC
0.42
0.55
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
–0.73
–1.2
V
II
Input current at
A0–A3, B0–B3
VCC = MAX, VI = 5.5V
1
mA
II
maximum input voltage
OEA, OEB
VCC = MAX, VI = 7.0V
100
A
IIH
High-level input current
OEA, OEB
VCC = MAX, VI = 2.7V
20
A
IIL
Low-level input current
only
VCC = MAX, VI = 0.5V
–1
mA
IIH+IOZH
Off-state output current
High-level voltage applied
VCC = MAX, VO = 2.7V
70
A
I +I
Off-state output current
Low-level voltage
74F242
V
= MAX V =0 5V
–1.0
mA
IIL+IOZL
Low-level voltage
applied
74F243
VCC = MAX, VO = 0.5V
–1.6
mA
IOS
Short-circuit output current3
VCC = MAX
–100
–225
mA
ICCH
22
35
mA
74F242
ICCL
VCC = MAX
40
55
mA
ICC
Supply current (total)
ICCZ
32
45
mA
ICC
Supply current (total)
ICCH
64
80
mA
74F243
ICCL
VCC = MAX
64
90
mA
ICCZ
71
90
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
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