參數(shù)資料
型號: MXD7210HL
廠商: Electronic Theatre Controls, Inc.
英文描述: Low Cost, Low Noise +-10 g Dual Axis Accelerometer with Digital Outputs
中文描述: 低成本,低噪聲-10克雙軸加速度計的數(shù)字輸出
文件頁數(shù): 5/10頁
文件大?。?/td> 647K
代理商: MXD7210HL
DIGITAL INTERFACE
The MXD7210GL/HL/ML/NL is easily interfaced with low
cost microcontrollers. For the digital output accelerometer,
one digital input port is required to read one accelerometer
output. For the analog output accelerometer, many low cost
microcontrollers are available today that feature integrated
A/D (analog to digital converters) with resolutions ranging
from 8 to 12 bits.
In many applications the microcontroller provides an
effective approach for the temperature compensation of the
sensitivity and the zero
g
offset. Specific code set, reference
designs, and applications notes are available from the
factory. The following parameters must be considered in a
digital interface:
Resolution
: smallest detectable change in input acceleration
Bandwidth
: detectable accelerations in a given period of
time
Acquisition Time
: the duration of the measurement of the
acceleration signal
DUTY CYCLE DEFINITION
MEMSIC MXD7210GL/HL/ML/NL
Page 5 of
10
2003.08.04
The MXD7210GL/HL/ML/NL has two PWM duty cycle
outputs (x,y). The acceleration is proportional to the ratio
T1/T2. The zero
g
output is set to 50% duty cycle and the
sensitivity scale factor is set to 4% duty cycle change per
g
.
These nominal values are affected by the initial tolerance of
the device including zero
g
offset error and sensitivity
error. This device is offered from the factory programmed
to either a 10ms period (100 Hz) or a 2.5ms period
(400Hz).
T1
Length of the “on” portion of the cycle.
T2 (Period)
Length of the total cycle.
Duty Cycle
Ratio of the “0n” time (T1) of the cycle to
the total cycle (T2). Defined as T1/T2.
Pulse width
Time period of the “on” pulse. Defined as
T1.
T2
T1
A (g)= (T1/T2 - 0.5)/0.04
0g = 50% Duty Cycle
T2= 2.5ms or 10ms (factory programmable)
Figure 3: Typical output Duty C ycle
CHOOSING T2 AND COUNTER FREQUENCY
DESIGN TRADE-OFFS
The noise level is one determinant of accelerometer
resolution. The second relates to the measurement
resolution of the counter when decoding the duty cycle
output. The actual resolution of the acceleration signal is
limited by the time resolution of the counting devices used
to decode the duty cycle. The faster the counter clock, the
higher the resolution of the duty cycle and the shorter the
T2 period can be for a given resolution. Table 2 shows
some of the trade-offs. It is important to note that this is the
resolution due to the microprocessors’ counter. It is
probable that the accelerometer’s noise floor may set the
lower limit on the resolution.
T2 (ms)
Rate
(MHz)
2.5
400
2.0
2.5
400
1.0
2.5
400
0.5
10.0
100
2.0
10.0
100
1.0
10.0
100
0.5
Table 2: Trade-Offs Between Microcontroller Counter Rate and
T2 Period.
CONVERTING THE DIGITAL OUTPUT TO AN
ANALOG OUTPUT
The PWM output can be easily converted into an analog
output by integration. A simple RC filter can do the
conversion. Note that that the impedance of the circuit
following the integrator must be much higher than the
impedance of the RC filter. Reference figure 4 for an
example.
MEMSIC
Sample
Counter-
Clock
Rate
Counts
Per T2
Cycle
5000
2500
1250
20000
10000
5000
Counts
per
g
200
100
50
800
400
200
Reso-
lution
(m
g
)
5.0
10
20
1.25
2.5
5.0
1uF
DOUT
AOUT
10K
MEMSIC
Accel.
Figure 4: Converting the digital output to an analog
voltage
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相關(guān)代理商/技術(shù)參數(shù)
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MXD7210ML 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Cost, Low Noise +-10 g Dual Axis Accelerometer with Digital Outputs
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