參數(shù)資料
型號(hào)： MX839DS
廠商： Electronic Theatre Controls, Inc.
英文描述： Digitally Controlled Analog I/O Processor
中文描述： 數(shù)字控制的模擬I / O處理器
文件頁(yè)數(shù)： 11/20頁(yè)
文件大?。?/td> 165K
代理商： MX839DS
Digitally Controlled Analog I/O Processor
11
MX839 PRELIMINARY INFORMATION
1998 MX
x
COM Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tele: 800 638-5577 336 744-5050 Fax: 336 744-5054
Doc. # 20480164.002
All trademarks and service marks are held by their respective companies.
4.7.3
This is a 16-bit register. Byte (1) is sent first. Bits 0 - 5 of the first byte in this register are used to enable and set the
attenuation of the Modulator 1 amplifier. Bits 0 - 5 of the second byte in this register are used to enable and set the
attenuation of the Modulator 2 amplifier. See Table 7.
VARIABLE ATTENUATOR Register (Hex address $D2)
5
0
4
X
3
X
2
X
1
X
0
X
Mod. 1 Attenuation
Disabled (V
BIAS
)
>40dB
12.0dB
11.6dB
11.2dB
10.8dB
10.4dB
10.0dB
9.6dB
9.2dB
8.8dB
8.4dB
8.0dB
7.6dB
7.2dB
6.8dB
6.4dB
6.0dB
5.6dB
5.2dB
4.8dB
4.4dB
4.0dB
3.6dB
3.2dB
2.8dB
2.4dB
2.0dB
1.6dB
1.2dB
0.8dB
0.4dB
0dB
5
0
4
X
3
X
2
X
1
X
0
X
Mod. 2 Attenuation
Disabled (V
BIAS
)
>40dB
6.0dB
5.8dB
5.6dB
5.4dB
5.2dB
5.0dB
4.8dB
4.6dB
4.4dB
4.2dB
4.0dB
3.8dB
3.6dB
3.4dB
3.2dB
3.0dB
2.8dB
2.6dB
2.4dB
2.2dB
2.0dB
1.8dB
1.6dB
1.4dB
1.2dB
1.0dB
0.8dB
0.6dB
0.4dB
0.2dB
0dB
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
X = don't care
MOD1 ENABLE
(Bit 5, first byte)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
When this bit is '1' the MOD1 attenuator is enabled.
When this bit is '0' the MOD1 attenuator is disabled (i.e. powersaved).
MOD2 ENABLE
(Bit 5, second byte)
When this bit is '1' the MOD2 attenuator is enabled.
When this bit is '0' the MOD2 attenuator is disabled (i.e. powersaved).
Reserved for future use. These should be set to '0'.
(Bits 7 and 6, first
and second bytes)
Table 7: VARIABLE ATTENUATOR Register (Hex address $D2)
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