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參數(shù)資料
| 型號(hào)： | MX839 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Digitally Controlled Analog I/O Processor |
| 中文描述： | 數(shù)字控制的模擬I / O處理器 |
| 文件頁(yè)數(shù)： | 4/20頁(yè) |
| 文件大?。?/td> | 165K |
| 代理商： | MX839 |
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Digitally Controlled Analog I/O Processor
4
MX839 PRELIMINARY INFORMATION
1998 MX
x
COM Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tele: 800 638-5577 336 744-5050 Fax: 336 744-5054
Doc. # 20480164.002
All trademarks and service marks are held by their respective companies.
2 Signal List
Pin No.
1
Name
XTAL
Type
output
Description
The output of the on-chip oscillator inverter.
2
3
XTAL/CLOCK
SERIAL CLOCK
input
input
The input to the on-chip oscillator inverter, for external Xtal circuit or clock.
The 'C-BUS' serial clock input. This clock, produced by the μC, is used for
transfer timing of commands and data to and from the device. See Figure 5.
The 'C-BUS' serial data input from the μC. Data is loaded into this device in
8-bit bytes, MSB (B7) first, and LSB (B0) last, synchronized to the SERIAL
CLOCK. See Figure 5.
The 'C-BUS' serial data output to the μC. The transmission of REPLY DATA
bytes is synchronized to the SERIAL CLOCK under the control of the CS
input.
This tri-state output is held at high impedance when not sending data to the
μC. See Figure 5.
The 'C-BUS' data loading control function. This input is provided by the μC.
Data transfer sequences are initiated, completed or aborted by the CS signal.
See Figure 5.
This output indicates an interrupt condition to the μC by going to a logic '0'.
This is a 'wire-ORable' output, enabling the connection of up to 8 peripherals
to 1 interrupt port on the μC. This pin has a low impedance pulldown to logic
'0' when active and a high-impedance when inactive. An external pullup
resistor is required.
The conditions that cause interrupts are indicated in the IRQ FLAG register
and are effective if not disabled.
Analog to digital converter input 1 (A/D1)
Analog to digital converter input 2 (A/D2)
Analog to digital converter input 3 (A/D3)
Analog to digital converter input 4 (A/D4)
Negative supply (ground) for both analog and digital supplies.
4
COMMAND DATA
input
5
REPLY DATA
output
6
CS
input
7
IRQ
output
8
9
A/DIN1
A/DIN2
A/DIN3
A/DIN4
V
SS
V
BIAS
input
input
input
input
power
10
11
12
13
output
An analog bias line for the internal circuitry, held at AV
DD
/2. This pin must be
bypassed by a capacitor mounted close to the device pins.
No internal connection. Do not make any connection to this pin.
Digital to analog converter No. 1 output (DAC1)
Digital to analog converter No. 2 output (DAC2)
Digital to analog converter No. 3 output (DAC3)
No internal connection. Do not make any connection to this pin.
Positive analog supply. Analog levels and voltages are dependent upon this
supply. This pin should be bypassed to V
SS
by a capacitor.
Input to MOD1 variable attenuator.
Input to MOD2 variable attenuator.
Output of MOD1 variable attenuator.
Output of MOD2 variable attenuator.
Positive digital supply. Digital levels and voltages are dependent upon this
supply. This pin should be bypassed to V
SS
by a capacitor.
14
15
16
17
18
19
N/C
DACOUT1
DACOUT2
DACOUT3
N/C
AV
DD
output
output
output
power
20
21
22
23
24
MOD1 IN
MOD2 IN
MOD1
MOD2
DV
DD
input
input
output
output
power
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