參數(shù)資料
型號(hào)： MX7837KR+T
廠商： Maxim Integrated Products
文件頁數(shù)： 6/12頁
文件大?。?/td> 0K
描述： IC DAC 12BIT DL MULT 24SOIC
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1,000
設(shè)置時(shí)間： 4µs
位數(shù)： 12
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 雙 ±
功率耗散（最大）： 941mW
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 24-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 24-SOIC W
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電壓，單極；2 電壓，雙極
采樣率（每秒）： *
MX7837/MX7847
Complete, Dual, 12-Bit
Multiplying DACs
_______________________________________________________________________________________
3
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
±0.01
Power-Supply Rejection
±0.01
% per %
Voltage-Output Settling
Time
tS
Settling time to within ±1/2LSB of final DAC value;
DAC latch alternately loaded will all 0s and all 1s
4
s
Slew Rate
7
V/s
Digital-to Analog Glitch
Impulse
Q
DAC latch alternately loaded with 01…11 and
10…00
60
nV-s
Channel-to-Channel Isolation
(VREFA to VOUTB,
VREFB to VOUTA)
VREF = 20p-p, 10kHz sine wave, Alternate DAC
Latch Loaded with all 0s
-95
dB
Multiplying Feedthrough
Error
-90
dB
Unity-Gain Small-Signal
Bandwidth
THD
1
MHz
Full-Power Bandwidth
125
kHz
Total Harmonic Distortion
VREF = 6VRMS, 1kHz, DAC latch loaded with all 1s
-88
dB
Digital Crosstalk
Code transition from all 0s to all 1s; see
Typical
Operating Characteristics graphs
10
nV-s
Output Noise Voltage at
+25°C (0.1Hz to 10Hz)
Amplifier noise and Johnson noise of RFB
2
VRMS
VDD Range
VDD
11.4
16.5
V
Positive Supply Current
IDD
510
mA
Output unloaded
Negative Supply Current
ISS
46
mA
Output unloaded
VSS Range
VSS
-11.4
-16.5
V
VREF = 20Vp-p Sine wave, DAC latch loaded with
all 1s
VREF = 100mVp-p sine wave, DAC latch loaded
with all 1s
VREF_ = 20Vp-p, 10kHz sine wave, latches loaded
with all 0s
VSS = -12V ±5%, VREF = 8.9V
VDD = 12V ±5%, VREF = -8.9V
VSS = -15V ±5%, VREF = 10V
VDD = 15V ±5%, VREF = -10V
Gain/VDD
Gain/VSS
Gain/VDD
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 11.4V to 16.5V, VSS = -11.4V to -16.5V, AGNDA = AGNDB = DGND = 0V, VREFA = VREFB = +10V, RL = 2k, CL = 100pF,
VOUT connected to RFB (MX7837), TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
Note 2: The analog outputs can swing to within 2.5V of the supply rails. Hence, for good linearity towards full-scale, |VREFA| and |VREFB| must
be at least 2.5V lower than VDD and |VSS|. Tests done with supply voltages below ±12.5V are done with VREFA = VREFB = ±8.9V.
Note 3: Static performance tested at VDD = +15V, VSS = -15V. Performance over supplies guaranteed by PSRR test.
Note 4: Guaranteed by design.
POWER REQUIREMENTS
AC CHARACTERISTICS
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