參數(shù)資料
型號(hào): MX7576JCWN+T
廠(chǎng)商: Maxim Integrated Products
文件頁(yè)數(shù): 6/12頁(yè)
文件大?。?/td> 0K
描述: IC ADC 8BIT MPU COMP 18-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 8
采樣率(每秒): 200k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 762mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 18-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 18-SOIC W
包裝: 帶卷 (TR)
輸入數(shù)目和類(lèi)型: 1 個(gè)單端,單極
MX7575/MX7576
CMOS, P-Compatible, 5s/10s, 8-Bit ADCs
_______________________________________________________________________________________
3
Note 1: Offset Error is measured with respect to an ideal first-code transition that occurs at 1/2LSB.
Note 2: Sample tested at +25°C to ensure compliance.
Note 3: Accuracy may degrade at conversion times other than those specified.
Note 4: Power-supply current is measured when MX7575/MX7576 are inactive, i.e.:
For MX7575
CS = RD = BUSY = high;
For MX7576
CS = RD = BUSY = MODE = high.
Using recommended
clock components:
RCLK = 100k,
CCLK = 100pF;
TA = +25°C
VOUT = 0V to VDD, D0–D7
VIN = 0V
VIN = VDD
4.75V < VDD < 5.25V
LSB
±1/4
Power-Supply Rejection
mW
15
Power Dissipation
mA
7
IDD
Supply Current
36
V
5
VDD
Supply Voltage
s
10
30
Conversion Time with
Internal Clock
515
s
10
Conversion Time with
External Clock
5
pF
10
Floating State Output
Capacitance (Note 2)
A
±10
Floating State Leakage Current
V
2.4
VINH
Input High Voltage
V
0.8
VINL
Input Low Voltage
±1
V
4.0
VOH
Output High Voltage
V
0.4
VOL
Output Low Voltage
700
IINL
A
800
Input Low Current
700
IINH
A
800
Input High Current
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
MX757_S/T
MX757_J/A/K/B
±5% for specified performance
MX7576
MX7575
MX7576: fCLK = 2MHz
TA = +25°C
ISOURCE = 40A
MX7575: fCLK = 4MHz
ISINK = 1.6mA
MX757_J/A/K/B
MX757_S/T
MX757_J/A/K/B
D0–D7
MX757_S/T
TA = TMIN to TMAX
CONDITIONS
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +5V; VREF = 1.23V; AGND = DGND = 0V; fCLK = 4MHz external for MX7575; fCLK = 2MHz external for MX7576;
TA = TMIN to TMAX, unless otherwise noted.)
CLOCK
LOGIC OUTPUTS (D0–D7,
BUSY)
CONVERSION TIME (Note 3)
POWER REQUIREMENTS (Note 4)
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