參數(shù)資料
型號(hào)： MX29LV040
廠商： Macronix International Co., Ltd.
英文描述： 0.5A 30V Schottky Rectifier; Package: SOD-123 2 LEAD; No of Pins: 2; Container: Tape and Reel; Qty per Container: 3000
中文描述： 4分位[為512k × 8] CMOS單電壓3V只等于部門閃存
文件頁(yè)數(shù)： 4/51頁(yè)
文件大?。?/td> 713K
代理商： MX29LV040
4
P/N:PM0722
MX29LV040
REV. 0.7, JUL. 12, 2001
AUTOMATIC PROGRAMMING
The MX29LV040 is byte programmable using the Auto-
matic Programming algorithm. The Automatic Program-
ming algorithm makes the external system do not need
to have time out sequence nor to verify the data pro-
grammed. The typical chip programming time at room
temperature of the MX29LV040 is less than 10 seconds.
AUTOMATIC CHIP ERASE
The entire chip is bulk erased using 10 ms erase pulses
according to MXIC's Automatic Chip Erase algorithm.
Typical erasure at room temperature is accomplished in
less than 11 second. The Automatic Erase algorithm
automatically programs the entire array prior to electri-
cal erase. The timing and verification of electrical erase
are controlled internally within the device.
AUTOMATIC SECTOR ERASE
The MX29LV040 is sector(s) erasable using MXIC's Auto
Sector Erase algorithm. The Automatic Sector Erase
algorithm automatically programs the specified sector(s)
prior to electrical erase. The timing and verification of
electrical erase are controlled internally within the de-
vice. An erase operation can erase one sector, multiple
sectors, or the entire device.
AUTOMATIC PROGRAMMING ALGORITHM
MXIC's Automatic Programming algorithm requires the
user to only write program set-up commands (including
2 unlock write cycle and A0H) and a program command
(program data and address). The device automatically
times the programming pulse width, provides the pro-
gram verification, and counts the number of sequences.
The device provides an unlock bypass mode with faster
programming. Only two write cycles are needed to pro-
gram a word or byte, instead of four. A status bit similar
to DATA polling and a status bit toggling between con-
secutive read cycles, provide feedback to the user as
to the status of the programming operation. Refer to write
operation status-table6, for more information on these
status bits.
AUTOMATIC ERASE ALGORITHM
MXIC's Automatic Erase algorithm requires the user to
write commands to the command register using stan-
dard microprocessor write timings. The device will auto-
matically pre-program and verify the entire array. Then
the device automatically times the erase pulse width,
provides the erase verification, and counts the number
of sequences. A status bit toggling between consecu-
tive read cycles provides feedback to the user as to the
status of the erasing operation.
Register contents serve as inputs to an internal state-
machine which controls the erase and programming cir-
cuitry. During write cycles, the command register inter-
nally latches address and data needed for the program-
ming and erase operations. During a system write cycle,
addresses are latched on the falling edge, and data are
latched on the rising edge of WE or CE, whichever hap-
pens first.
MXIC's Flash technology combines years of EPROM
experience to produce the highest levels of quality, reli-
ability, and cost effectiveness. The MX29LV040 electri-
cally erases all bits simultaneously using Fowler-
Nordheim tunneling. The bytes are programmed by us-
ing the EPROM programming mechanism of hot elec-
tron injection.
During a program cycle, the state-machine will control
the program sequences and command register will not
respond to any command set. During a Sector Erase
cycle, the command register will only respond to Erase
Suspend command. After Erase Suspend is completed,
the device stays in read mode. After the state machine
has completed its task, it will allow the command regis-
ter to respond to its full command set.
AUTOMATIC SELECT
The automatic select mode provides manufacturer and
device identification, and sector protection verification,
through identifier codes output on Q7~Q0. This mode is
mainly adapted for programming equipment on the de-
vice to be programmed with its programming algorithm.
When programming by high voltage method, automatic
select mode requires VID (11.5V to 12.5V) on address
pin A9 and other address pin A6, A1, and A0 as referring
to Table 2. In addition, to access the automatic select
codes in-system, the host can issue the automatic se
相關(guān)PDF資料
PDF描述
MX29LV040QC-55 0.5A 30V Schottky Rectifier; Package: SOD-123 2 LEAD; No of Pins: 2; Container: Tape and Reel; Qty per Container: 3000
MX29LV040QC-70 0.5A 30V Schottky Rectifier; Package: SOD-123 2 LEAD; No of Pins: 2; Container: Tape and Reel; Qty per Container: 10000
MX29LV040QC-90 0.5A 30V Schottky Rectifier; Package: SOD-123 2 LEAD; No of Pins: 2; Container: Tape and Reel; Qty per Container: 10000
MX29LV040TC-55 0.5A 40V Schottky Rectifier; Package: SOD-123 2 LEAD; No of Pins: 2; Container: Tape and Reel; Qty per Container: 3000
MX29LV040TC-70 0.5A 40V Schottky Rectifier; Package: SOD-123 2 LEAD; No of Pins: 2; Container: Tape and Reel; Qty per Container: 3000
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MX29LV040CQC-55Q 制造商:Macronix International Co Ltd 功能描述:4M (512K X8) 70NS 32PLCC
MX29LV040CQC-70G 制造商:Macronix International Co Ltd 功能描述:MX29LV Series 3 V 4 Mb (512K x 8) 70 ns Parallel Flash - PLCC-32
MX29LV040CQC-90G 制造商:MISCELLANEOUS 功能描述: 制造商:Macronix International Co Ltd 功能描述:IC FLASH 4MBIT 90NS 32PLCC 制造商:Macronix International Co Ltd 功能描述:MX29LV Series 3 V 4 Mb (512K x 8) 90 ns Parallel Flash - PLCC-32
MX29LV040CQI-55Q 制造商:Macronix International Co Ltd 功能描述:IC FLASH 4MBIT 55NS 32PLCC 制造商:Macronix International Co Ltd 功能描述:MX29LV Series 3 V 4 Mb (512K x 8) 55 ns Parallel Flash - PLCC-32
MX29LV040CQI-70G 功能描述:IC FLASH PAR 3V 4MB 70NS 32PLCC RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:MX29LV 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:閃存 - NAND 存儲(chǔ)容量:4G（256M x 16） 速度:- 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP I 包裝:Digi-Reel® 其它名稱:557-1461-6
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