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參數(shù)資料
| 型號(hào)： | MX27L2000TI-20 |
| 廠商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分類： | DRAM |
| 英文描述： | null2M-BIT [256Kx8] CMOS EPROM |
| 中文描述： | 256K X 8 OTPROM, 200 ns, PDSO32 |
| 封裝： | 8 X 20 MM, PLASTIC, MO-142, TSOP1-32 |
| 文件頁(yè)數(shù)： | 3/18頁(yè) |
| 文件大?。?/td> | 1392K |
| 代理商： | MX27L2000TI-20 |
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3
MX27L2000
REV. 2.9, JAN. 22, 2002
P/N: PM0372
SYSTEM CONSIDERATIONS
During the switch between active and standby
conditions, transient current peaks are produced on the
rising and falling edges of Chip Enable. The magnitude
of these transient current peaks is dependent on the
output capacitance loading of the device. At a minimum,
a 0.1 uF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
Vcc and GND to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7 uF bulk electrolytic capacitor should be
used between VCC and GND for each eight devices.
The location of the capacitor should be close to where
the power supply is connected to the array.
NOTES:
1. VH = 12.0 V
±
0.5 V
2. X = Either VIH or VIL
3. A1 - A8 = A10 - A17 = VIL(For auto select)
4. See DC Programming Characteristics for VPP voltage during programming.
MODE SELECT TABLE
PINS
A0
X
X
X
X
X
X
X
VIL
VIH
MODE
Read
Output Disable
Standby (TTL)
Standby (CMOS)
Program
Program Verify
Program Inhibit
Manufacturer Code(3) VIL
Device Code(3)
CE
VIL
VIL
VIH
VCC
±
0.3V
VIL
VIL
VIH
OE
VIL
VIH
X
X
VIH
VIL
X
VIL
VIL
PGM
X
X
X
X
VIL
VIH
X
X
X
A9
X
X
X
X
X
X
X
VH
VH
VPP
VCC
VCC
VCC
VCC
VPP
VPP
VPP
VCC
VCC
OUTPUTS
DOUT
High Z
High Z
High Z
DIN
DOUT
High Z
C2H
20H
VIL
TWO-LINE OUTPUT CONTROL FUNCTION
To accommodate multiple memory connections, a two-
line control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not
occur.
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
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