參數(shù)資料
型號： MX27C512TI-70
廠商： MACRONIX INTERNATIONAL CO LTD
元件分類： DRAM
英文描述： 512K-BIT [64Kx8] CMOS EPROM
中文描述： 64K X 8 OTPROM, 70 ns, PDSO28
封裝： 8 X 13.40 MM, PLASTIC, MO-183, TSOP1-28
文件頁數(shù)： 1/15頁
文件大?。?/td> 742K
代理商： MX27C512TI-70
Operating current: 30mA
Standby current: 100uA
Package type:
- 28 pin plastic DIP
- 32 pin PLCC
- 28 pin 8 x 13.4 mm TSOP(I)
1
PIN CONFIGURATIONS
PDIP
GENERAL DESCRIPTION
The MX27C512 is a 5V only, 512K-bit, ultraviolet Eras-
able Programmable Read Only Memory. It is organized
as 64K words by 8 bits per word, operates from a single
+5volt supply, has a static standby mode, and features
fast single address location programming. All program-
ming signals are TTL levels, requiring a single pulse. For
programming outside from the system, existing EPROM
programmers may be used. The MX27C512 supports
intelligent fast programming algorithm which can result
in programming time of less than fifteen seconds.
This EPROM is packaged in industry standard 28 pin
dual-in-line packages 32 lead PLCC, and 28 lead
TSOP(I) packages.
FEATURES
64K x 8 organization
Single +5V power supply
+12.5V programming voltage
Fast access time: 45/55/70/90/100/120/150ns
Totally static operation
Completely TTL compatible
P/N: PM0235
REV. 4.5, NOV. 09, 2001
BLOCK DIAGRAM
PIN DESCRIPTION
PLCC
8 x 13.4mm 28TSOP(I)
SYMBOL
A0~A15
Q0~Q7
CE
OE/VPP
PIN NAME
Address Input
Data Input/Output
Chip Enable Input
Output Enable Input/Program Supply
Voltage
No Internal Connection
Power Supply Pin (+5V)
Ground Pin
NC
VCC
GND
MX27C512
512K-BIT [64Kx8] CMOS EPROM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
A14
A13
A8
A9
A11
OE/VPP
A10
CE
Q7
Q6
Q5
Q4
Q3
M
1
4
5
9
13
14
17
2021
25
29
32
30
A8
A9
A11
NC
OE/VPP
A10
CE
Q7
Q6
A6
A5
A4
A3
A2
A1
A0
NC
Q0
Q
Q
G
N
Q
Q
Q
A
A
A
N
V
A
A
MX27C512
OE/VPP
A11
A9
A8
A13
A14
VCC
A15
A12
A7
A6
A5
A4
A3
22
23
24
25
26
27
28
1
2
3
4
5
6
7
A10
CE
Q7
Q6
Q5
Q4
Q3
GND
Q2
Q1
Q0
A0
A1
A2
21
20
19
18
17
16
15
14
13
12
11
10
9
8
MX27C512
CONTROL
LOGIC
OUTPUT
BUFFERS
Q0~Q7
CE
OE/VPP
A0~A15
ADDRESS
INPUTS
Y-DECODER
X-DECODER
Y-SELECT
512K BIT
CELL
MAXTRIX
VCC
GND
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
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