參數(shù)資料
型號： MX26L1620XBC-12
廠商： MACRONIX INTERNATIONAL CO LTD
元件分類： DRAM
英文描述： 16M-BIT [1M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM
中文描述： 1M X 16 FLASH 3V PROM, 120 ns, PBGA48
封裝： 0.80 MM PITCH, PLASTIC, CSP-48
文件頁數(shù)： 1/36頁
文件大小： 683K
代理商： MX26L1620XBC-12
1
P/N:PM0827
REV. 0.4, JAN. 31, 2002
MX26L1620
16M-BIT [1M x 16] CMOS
MULTIPLE-TIME-PROGRAMMABLE EPROM
ADVANCED INFORMATION
FEATURES
1,048,576 x 16 byte structure
Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program
operations
Low Vcc write inhibit is equal to or less than 2.5V
Compatible with JEDEC standard
High Performance
- Fast access time: 90/120ns (typ.)
- Fast program time: 35s/chip (typ.)
- Fast erase time: 45s/chip (typ.)
Low Power Consumption
- Low active read current: 10mA (typ.) at 5MHz
- Low standby current: 30uA (typ.)
Minimum 100 erase/program cycle
10-year data retention
Status Reply
- Data polling & Toggle bits provide detection of
program and erase operation completion
12V ACC input pin provides accelerated program
capability
Output voltages and input voltages on the device is
determined by the voltage on the VI/O pin.
- VI/O voltage range:1.65V~3.6V
Package
- 44-Pin SOP
- 48-Pin TSOP
- 48-Ball CSP
GENERAL DESCRIPTION
The MX26L1620 is a 16M bit MTP EPROM
TM
organized
as 1M bytes of 16 bits. MXIC's MTP EPROM
TM
offer the
most cost-effective and reliable read/write non-volatile
random access memory. The MX26L1620 is packaged in
44-pin SOP, 48-pin TSOP and 48-ball CSP. It is designed
to be reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX26L1620 offers access time as fast as
90ns, allowing operation of high-speed microprocessors
without wait states. To eliminate bus contention, the
MX26L1620 has separate chip enable (CE) and output
enable OE controls. MXIC's MTP EPROM
TM
augment
EPROM functionality with in-circuit electrical erasure and
programming. The MX26L1620 uses a command register
to manage this functionality.
MXIC's MTP EPROM
TM
technology reliably stores
memory contents even after 100 erase and program
cycles. The MXIC cell is designed to optimize the erase
and program mechanisms. In addition, the combination of
advanced tunnel oxide processing and low internal
electric fields for erase and programming operations
produces reliable cycling.
The MX26L1620 uses a 2.7V to 3.6V VCC supply to
perform the High Reliability Erase and auto Program/
Erase algorithms.
The highest degree of latch-up protection is achieved with
MXIC's proprietary non-epiprocess. Latch-up protection
is proved for stresses up to 100 milliamps on address and
data pin from -1V to VCC +1V.
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