參數資料
型號: MX10C8050PC
廠商: Electronic Theatre Controls, Inc.
英文描述: SINGLE-CHIP 8-BIT MICROCONTROLLER
中文描述: 單芯片8位微控制器
文件頁數: 5/14頁
文件大小: 96K
代理商: MX10C8050PC
5
P/N:PM0591
REV. 0.3, APR. 09, 1999
MX10C805X
Table 2. Status of the External Pins during Idle and Power Down
Mode
Idle
Idle
Power Down
Power Down
Program Memory
Internal
External
Internal
External
ALE
1
1
0
0
PSEN
1
1
0
0
PORT0
Data
Float
Data
Float
PORT1
Data
Data
Data
Data
PORT2
Data
Address
Data
Data
PORT3
Data
Data
Data
Data
POWER DOWN MODE
To save even more power, a Power Down mode can be
invoked by software. If this mode, the oscillator is stopped
and the instruction that invoked Power Down is the last
instruction executed. The on-chip RAM and Special
Function Registers retain their values until the Power
Down mode is terminated.
On the MX10C805X either a hardware reset or an ex-
ternal interrupt can cause an exit from Power Down. Re-
set redefines all the SFRs but does not change the on-
chip RAM. An external interrupt allows both the SFRs
and on-chip RAM to retain their values.
ABSOLUTE MAXIMUM RATING*
Ambient Temperature Under Bias
Storage Temperature
Voltage on Any Other Pin to VSS
IOL Per I/O Pin
Power Dissipation
-40
°
C to +85
°
C
-65
°
C to +150
°
C
-0.5V to +6.5V
15mA
1.5W
(Based on PACKAGE heat transfer limitations, not de-
vice consumption)
IDLE MODE
The user's software can invoke the Idle Mode. When
the microcontroller is in this mode, power consumption
is reduced. The Special Function Registers and the
onboard RAM retain their values during Idle, but the pro-
cessor stops executing instructions. Idle Mode will be
exited if the chip is reset or if an enabled interrupt oc-
curs.
OPERATING CONDITIONS
Symbol
TA
Description
Ambient Temperature Under Bias
Commerical
Industrial
Min
Max
Units
0
-40
4.5
3.5
+70
+85
5.5
40
°
C
°
C
V
MHz
VCC
fOSC
Oscillator Frequency
To properly terminate Power Down, the reset or exter-
nal interrupt should not be executed before VCC is re-
stored to its normal operating level, and must be held
active long enough for the oscillator to restart and stabi-
lize (normally less than 10 ms).
With an external interrupt, INT0 and INT1 must be en-
abled and configured as level-sensitive. Holding the pin
low restarts the oscillator but bringing the pin back high
completes the exit. Once the interrupt is serviced, the
next instruction to be executed after RETI will be the
one following the instruction that put the device into Power
Down.
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