參數(shù)資料
型號: MTP805N
廠商: Electronic Theatre Controls, Inc.
英文描述: 8051 Embedded USB/PS2 Keyboard/Mouse Controller
中文描述: 8051嵌入式USB/PS2鍵盤/鼠標(biāo)控制器
文件頁數(shù): 5/15頁
文件大小: 125K
代理商: MTP805N
MYSON
TECHNOLOGY
MTP805
(Rev. 0.9)
Revision 0.9 - 5 - 2000/07/19
3. I/O Pin Usage
3.1 KSO0~7
These pins are direct output from the 8051’s Port1 and dedicated for key scan output. The pin’s input
function is removed. Read 8051’s Port1 is only read the data in the Port1’s output register. These pins are
“Pseudo open-drain” structure.
3.2 KSO8~15
These pins are direct output from the 8051’s Port2 and dedicated for key scan output. The pin’s input
function is removed. Read 8051’s Port2 is only read the data in the Port2’s output register. These pins are
“Pseudo open-drain” structure.
3.3 KSO16~17, GPIO0~1
These pins are output from MTP805’s XFR. They can be used as key scan output or general purpose I/O.
Read these pins will read the data on pin. These pins are also “Pseudo open-drain” structure.
3.4 MSCLK, MSDATA
These pins are connected to 8051’s P3.1 and P3.0. The usage of these pins are the same as standard 8051
except the UART’s function being not provided. These pins are also “Pseudo open-drain” structure.
2 OSC
period
delay
4mA
50uA
Write
Data
500uA
Pin
4mA
Read
Data
KSO0~15
Q
D
CK
/WR
Output
Register
1 OSC
period
delay
4mA
50uA
Write
Data
500uA
Pin
4mA
KSO16~17, GPIO0~1
Q
D
CK
/WR
Output
Register
Read
Data
2 OSC
period
delay
4mA
50uA
Write
Data
500uA
Pin
4mA
Read
Latch
Data
MSCLK, MSDATA
Q
D
CK
/WR
Output
Register
Read
Pin
Data
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