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MTA41300
DS40101C-page 10
1995 Microchip Technology Inc.
7.0
ELECTRICAL CHARACTERISTICS
7.1
Absolute Maximum Ratings
Ambient temperature under bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55
°C to +125°C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65
°C to +150°C
Voltage on any pin with respect to VSS (except VDD and MCLR) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to (VDD +0.6V)
Voltage on MCLR pin with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +14.0V
Voltage on VDD with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +9.5V
Total power dissipation (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .800 mW
Maximum current out of VSS pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 mA
Maximum current into VDD pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Maximum current into input pin
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±500 A
Maximum output current sinked by any I/O or output pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Maximum output current sourced by any I/O or output pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Notes:
1.
Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80 mA may cause latch-up. Thus, a
series resistor of 50
to 100 should be used when applying a “l(fā)ow” level to this pin, rather than connecting this
pin directly to VSS.
2.
Total power dissipation should not exceed 800 mW for the package. The total power dissipation is calculated as
follows:
PDIS= VDD x (IDD -
∑IOH) + ∑{(VDD - VOH) x IOH} + ∑(VOL x IOL).
Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indicated in the operation listings of this specification is not implied. Exposure to maximum
rating conditions for extended periods may affect device reliability.