參數(shù)資料
型號: MT9300BL
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數(shù)字傳輸電路
英文描述: Multi-Channel Voice Echo Canceller
中文描述: DATACOM, ISDN ECHO CANCELLER, PQFP160
封裝: MQFP-160
文件頁數(shù): 11/39頁
文件大?。?/td> 629K
代理商: MT9300BL
MT9300B
Data Sheet
11
Zarlink Semiconductor Inc.
The MT9300B has two Tone Detectors per channels (for a total of 64) in order to monitor the occurrence of a valid
disable tone on both Rin and Sin. Upon detection of a disable tone, TD bit of the Status Register will indicate logic
high and an interrupt is generated (i.e., IRQ pin low). Refer to Figure 5 and to the
Interrupts
section.
Figure 5 - Disable Tone Detection
Once a Tone Detector has been triggered, there is no longer a need for a valid disable tone (G.164 or G.165) to
maintain Tone Detector status (i.e., TD bit high). The Tone Detector status will only release (i.e., TD bit low) if the
signals Rin and Sin fall below -30 dBm0, in the frequency range of 390 Hz to 700 Hz, and below -34 dBm0, in the
frequency range of 700 Hz to 3400 Hz, for at least 400 ms. Whenever a Tone Detector releases, an interrupt is
generated (i.e,. IRQ pin low).
The selection between G.165 and G.164 tone disable is controlled by the PHDis bit in Control Register 2 on a per
channel basis. When the PHDis bit is set to 1, G.164 tone disable requirements are selected.
In response to a valid disable tone, the echo canceller must be switched from the Enable Adaptation state to the
Bypass state. This can be done in two ways, automatically or externally. In automatic mode, the Tone Detectors
internally control the switching between Enable Adaptation and Bypass states. The automatic mode is activated by
setting the AutoTD bit in Control Register 2 to high. In external mode, an external controller is needed to service the
interrupts and poll the TD bits in the Status Registers. Following the detection of a disable tone (TD bit high) on a
given channel, the external controller must switch the echo canceller from Enable Adaptation to Bypass state.
Instability Detector
In systems where the echo path return loss (ERL) is very low (<3 dB), a high loop gain may result. As a
consequence, an unstable condition may occur due to diverged echo canceller coefficients. This instability can
result in variable pitched ringing or oscillation. Should this ringing occur, the Instability Detector will activate and
suppress the oscillations.
The Instability Detector is activated by setting the RingClr bit in Control Register A3/B3 to "1".
TD bit
Rin
Sin
Echo Canceller
A
Tone
Detector
Tone
Detector
Status reg
ECA
TD
bit
Rin
Sin
Echo Canceller
B
Tone
Detector
Tone
Detector
Status reg
ECB
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