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參數資料
| 型號： | MT9171AE |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 數字傳輸電路 |
| 英文描述： | ISO2-CMOS ST-BUS FAMILY |
| 中文描述： | DATACOM, DIGITAL SLIC, PDIP22 |
| 封裝： | 0.400 INCH, PLASTIC, DIP-22 |
| 文件頁數： | 7/25頁 |
| 文件大?。?/td> | 401K |
| 代理商： | MT9171AE |
Advance Information
MT9171/72
9-121
In DIGITAL NETWORK (DN) mode, upon entering
the DNIC from the DV and CD ports, the B-channel
data, D-channel D0 (and D1 for 160 kbit/s), the HK
bit of the C-channel (160kbit/s only) and a SYNC bit
are combined in a serial format to be sent out on the
line by the Transmit Interface (Figures 11, 12). The
SYNC bit produces an alternating 1-0 pattern each
frame in order for the remote end to extract the frame
alignment from the line. It is possible for the remote
end to lock on to a data bit pattern which simulates
this alternating 1-0 pattern that is not the true
SYNC. To decrease the probability of this happening
the DNIC may be programmed to put the data
through a prescrambler that scrambles the data
according to a predetermined polynomial with
respect to the SYNC bit. This greatly decreases the
probability that the SYNC pattern can be reproduced
by any data on the line. In order for the echo
canceller to function correctly, a dedicated scrambler
is used with a scrambling algorithm which is different
for the SLV and MAS modes. These algorithms are
calculated in such a way as to provide orthogonality
between the near and far end data streams such that
the correlation between the two signals is very low.
For any two DNICs on a link, one must be in SLV
mode with the other in MAS mode. The scrambled
data is differentially encoded which serves to make
the data on the line polarity-independent. It is then
biphase encoded as shown in Figure 10. See “Line
Interface” section for more details on the encoding.
Before leaving the DNIC the differentially encoded
biphase data is passed through a pulse-shaping
bandpass transmit filter that filters out the high and
low frequency components and conditions the signal
for transmission on the line.
The composite transmit and receive signal is
received at L
IN
.
On entering the DNIC this signal
passes through a Precanceller which is a summing
amplifier and lowpass filter that partially cancels the
near-end signal and provides first order antialiasing
for the received signal. Internal, partial cancellation
Figure 7 - CD Port (Modes 2,6)
Figure 8 - CD Port (Modes 1,5)
F0
C4
CDSTo
CDSTi
F0o
C
0
C
1
C
2
C
3
C
4
C
5
C
6
C
7
C
0
C
1
C
2
C
3
C
4
C
5
C
6
C
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
C
0
C
0
3.9
μ
sec
62.5
μ
sec
125
μ
sec
Channel Time 0
Channel Time 16
CLD
TCK
CDi
CDo
C
0
C
1
C
2
C
3
C
4
C
5
C
6
C
7
C
6
C
7
C
0
C
1
C
0
C
1
C
2
C
3
C
4
C
5
C
6
C
7
C
6
C
7
C
0
C
1
相關PDF資料 |
PDF描述 |
|---|---|
| MT9171AN | ISO2-CMOS ST-BUS FAMILY |
| MT9171AP | ISO2-CMOS ST-BUS FAMILY |
| MT9171 | ISO2-CMOS ST-BUS⑩ FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit |
| MT9171AE | ISO2-CMOS ST-BUS⑩ FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit |
| MT9171AN | ISO2-CMOS ST-BUS⑩ FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MT9171AE1 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Subscriber Interface Circuit Digital Network Interface Circuit |
| MT9171AN | 制造商:Microsemi Corporation 功能描述: |
| MT9171AN1 | 制造商:Zarlink Semiconductor Inc 功能描述:PB FREE DNIC 1.5UM - Rail/Tube |
| MT9171ANR | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Subscriber Interface Circuit Digital Network Interface Circuit |
| MT9171ANR1 | 制造商:Microsemi Corporation 功能描述:PB FREE DNIC 1.5MM - Tape and Reel 制造商:Zarlink Semiconductor Inc 功能描述:PB FREE DNIC 1.5MM - Tape and Reel |
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