參數(shù)資料
型號: MT8981D
廠商: Mitel Networks Corporation
英文描述: ISO-CMOS ST-BUS⑩ FAMILY Digital Switch
中文描述: 異意法半導(dǎo)體的CMOS總線⑩家庭數(shù)字開關(guān)
文件頁數(shù): 13/17頁
文件大?。?/td> 561K
代理商: MT8981D
ISO-CMOS
MT8981D
2-29
Timing is over recommended temperature & power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* High Impedance is measured by pulling to the appropriate rail with R
, with timing corrected to cancel time taken to discharge C
.
Processor accesses are dependent on the C4i clock, and so some timings are expressed as multiples of the C4i clock period.
Figure 17 - Processor Bus
AC Electrical Characteristics
- Processor Bus (Figures 11 and 17)
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
Chip Select Setup Time
t
CSS
t
RWS
t
ADS
t
AKD
t
AKD
t
FWS
t
SWD
t
RDS
t
DHT
t
DHT
t
RDZ
t
CSH
t
RWH
t
ADH
t
AKH
20
0
ns
2
Read/Write Setup Time
25
5
ns
3
Address Setup Time
25
5
ns
4
Acknowledgement Delay Fast
Slow
40
100
ns
C
L
=150 pF
C4i cycles
2.7
7.2
cycles
5
Fast Write Data Setup Time
20
ns
C4i cycles
C4i cycles
, C
L
= 150 pF
R
L
=1 K
, C
L
=150 pF
6
Slow Write Data Delay
2.0
1.7
cycles
7
Read Data Setup Time
0.5
cycles
8
Data Hold Time
Read
Write
20
ns
20
10
ns
9
Read Data To High Impedance
50
90
ns
R
L
=1 K
, C
L
=150 pF
10
Chip Select Hold Time
0
ns
11
Read/Write Hold Time
0
ns
12
Address Hold Time
0
ns
13
Acknowledgement Hold Time
10
60
80
ns
R
L
=1 K
, C
L
=150 pF
DS
2.0V
0.8V
2.0V
0.8V
2.0V
0.8V
2.0V
0.8V
2.4V
0.4V
2.4V (Read) 2.0V (Write)
0.8V (Read 0.8V (Write)
CS
R/W
A5
to
A0
DTA
D7
to
D0
t
CSS
t
RWS
t
ADS
t
AKD
t
RDS
t
SWD
t
FWS
t
CSH
t
RWH
t
ADH
t
AKH
t
DHT
*
*
*
*
t
RDZ
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