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參數(shù)資料
| 型號： | MT8941BPR |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 通信及網絡 |
| 英文描述： | Round Conductor Flat Cable, 3849/96 30 AWG, .033 (0.85) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQCC28 |
| 封裝： | PLASTIC, MS-018AB, LCC-28 |
| 文件頁數(shù)： | 19/27頁 |
| 文件大?。?/td> | 491K |
| 代理商： | MT8941BPR |
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MT8941B
Data Sheet
19
Zarlink Semiconductor Inc.
Timing is over recommended temperature & power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
Figure 14 - Timing Information for DPLL #1 in NORMAL Mode
Timing is over recommended temperature & power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
AC Electrical Characteristics
-
Voltages are with respect to ground (V
SS
) unless otherwise stated.
(Refer to Figure 14)
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
D
P
L
L
#1
CVb output (1.544 MHz) rise
time
t
r1.5
6
ns
85 pF Load
2
CVb output (1.544 MHz) fall
time
t
f1.5
6
ns
85 pF Load
3
CVb output (1.544 MHz) clock
period
t
P15
607
648
689
ns
4
CVb output (1.544 MHz) clock
width (HIGH)
t
W15H
318
324
ns
5
CVb output (1.544 MHz) clock
width (LOW)
t
W15L
277
363
ns
6
CV delay (HIGH to LOW)
t
15HL
t
15LH
0
10
ns
7
CV delay (LOW to HIGH)
-7
3
ns
AC Electrical Characteristics
-
Voltages are with respect to ground (V
SS
) unless otherwise stated.
(Refer to Figure 15)
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
D
P
L
L
#1
C8Kb output (8 kHz) delay
(HIGH to HIGH)
t
C8HH
0
10
25
ns
85 pF Load
2
C8Kb output (8 kHz) delay
(LOW to LOW)
t
C8LL
13
34
ns
85 pF Load
3
C8Kb output duty cycle
66
50
%
%
In Divide -1 Mode
In Divide - 2 Mode
4
Inverted clock output delay
(HIGH to LOW)
t
ICHL
0
10
25
ns
5
Inverted clock output delay
(LOW to HIGH)
t
ICLH
0
7
18
ns
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