參數(shù)資料
型號(hào): MT8941
廠商: Zarlink Semiconductor Inc.
英文描述: Advanced T1/CEPT Digital Trunk PLL
中文描述: 高級(jí)T1/CEPT數(shù)字集群鎖相環(huán)
文件頁數(shù): 11/27頁
文件大小: 491K
代理商: MT8941
MT8941B
Data Sheet
11
Zarlink Semiconductor Inc.
Figure 6 - The Jitter Transfer Function for PLL1
Figure 7 - The Jitter Transfer Function for PLL2
However, if DPLL #1 and DPLL #2 are daisy-chained as shown in Figures 9 and 10, the output clock tolerance of
DPLL #1 will be equal to that of the DPLL #2 oscillator when DPLL #2 is free-running. In this case, the oscillator
tolerance of DPLL #1 has no impact on its output clock tolerance. For this reason, it is recommended to use a
±
32 ppm oscillator for DPLL #2 and a
±
100 ppm oscillator for DPLL #1.
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MT8941BE Advanced T1/CEPT Digital Trunk PLL
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MT8941BP1 Advanced T1/CEPT Digital Trunk PLL
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT8941AE 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL
MT8941AP 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL
MT8941B 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL
MT8941BE 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Advanced T1/CEPT Digital Trunk PLL
MT8941BP 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Advanced T1/CEPT Digital Trunk PLL