- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄359232 > MT88E46 (Zarlink Semiconductor Inc.) Bellcore Compliant Calling Number Identification Circuit PDF資料下載
參數(shù)資料
| 型號(hào)： | MT88E46 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Bellcore Compliant Calling Number Identification Circuit |
| 中文描述： | 貝爾通訊兼容主叫號(hào)碼識(shí)別電路 |
| 文件頁(yè)數(shù)： | 19/23頁(yè) |
| 文件大?。?/td> | 522K |
| 代理商： | MT88E46 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)當(dāng)前第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)
Advance Information
MT88E46
19
Figure 13 - CAS Detection Timing
Figure 14 - FSK Data Interface Timing - Mode 0
Figure 15 - FSK Data Interface Timing - Mode 1
CAS
DET
(Output)
t
DET2
t
DW
= 416
μ
s nominal
t
DET1
See ‘AC Electrical Characteristics -
CAS Detection’ for t
DET1
and t
DET2
values.
Note: The relationship between DATA bit boundary and DCLK is symbolic only. In reality, the DATA bit boundary will jitter with
respect to the DCLK falling edges.
TIP/RING
DATA
(Output)
DCLK
(Output)
DR
(Output)
b7
b0 b1 b2 b3 b4 b5 b6 b7
b0 b1 b2 b3 b4 b5 b6 b7
b0 b1 b2 b3 b4 b5
b7
b0 b1 b2 b3 b4 b5 b6 b7
b0 b1 b2 b3 b4 b5 b6 b7
b0 b1 b2 b3
b6
stop
start
stop
start
stop
start
stop
start
stop
start
stop
start
t
IDD
t
CRD
t
RL
t
CL
t
CH
1/f
DCLK0
Demodulated Data
(Internal Signal)
DCLK (Data Clock)
(Schmitt Input)
DR (Data Ready)
(Output)
stop
start
stop
0
1
2
3
4
5
6
7
7
Word N
Word N+1
DATA
(Output)
5
Word N
Word N-1
1/f
DCLK1
t
RL
>t
DDH
The DCLK input must be low before and after DR falling edge.
Note 1: DCLK occurs during DR low and returns DR to high.
Note 2: DCLK occurs after DR, so DR is low for half a nominal bit time.
Note 3: When framing error (trailing stop bit a 0 instead of a 1) is not checked, the microcontroller only needs to send 8 DCLK
pulses to shift the byte out.
>t
DDS
4
3
2
1
0
6
7
stop
stop
7
0
Note 1
Note 2
Note 3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT88E46AS | Bellcore Compliant Calling Number Identification Circuit |
| MT88EBNR | 4-Wire Calling Number Identification Circuit 2 (4-Wire CNIC2) |
| MT88L70AE1 | 3 Volt Integrated DTMF Receiver |
| MT88L70AE | 3 Volt Integrated DTMF Receiver |
| MT88L70AN | 3 Volt Integrated DTMF Receiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT88E46_06 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Bellcore Compliant Calling Number Identification Circuit |
| MT88E46AS | 制造商:Microsemi Corporation 功能描述:CALLER ID CMOS 3.58MHZ 3.3V/5V 20SOIC - Rail/Tube |
| MT88E46AS1 | 制造商:Microsemi Corporation 功能描述:CALLER ID CMOS 3.58MHZ 3.3V/5V 20SOIC - Rail/Tube |
| MT88E46ASR | 制造商:Microsemi Corporation 功能描述:CALLER ID CMOS 3.58MHZ 3.3V/5V 20SOIC - Tape and Reel |
| MT88E46ASR1 | 制造商:Microsemi Corporation 功能描述:CALLER ID CMOS 3.58MHZ 3.3V/5V 20SOIC - Tape and Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。