參數(shù)資料
型號: MT58L128L36D1T-5IT
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 128K X 36 STANDARD SRAM, 2.8 ns, PQFP100
封裝: PLASTIC, MS-026BHA, TQFP-100
文件頁數(shù): 1/23頁
文件大?。?/td> 604K
代理商: MT58L128L36D1T-5IT
1
4Mb: 256K x 18, 128K x 32/36 3.3V I/O Pipelined, DCD SyncBurst SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT58L256L18D1.p65 – Rev 12/99
1999, Micron Technology, Inc.
4Mb: 256K x 18, 128K x 32/36
3.3V I/O PIPELINED, DCD SYNCBURST SRAM
PRELIMINARY
FEATURES
Fast clock and OE# access times
Single +3.3V +0.3V/-0.165V power supply (VDD)
Separate +3.3V isolated output buffer supply
(VDDQ)
SNOOZE MODE for reduced-power standby
Common data inputs and data outputs
Individual BYTE WRITE control and GLOBAL
WRITE
Three chip enables for simple depth expansion and
address pipelining
Clock-controlled and registered addresses, data
I/Os and control signals
Internally self-timed WRITE cycle
Burst control pin (interleaved or linear burst)
Automatic power-down for portable applications
100-lead TQFP package for high density, high
speed
119-pin BGA package
Low capacitive bus loading
x18, x32 and x36 versions available
OPTIONS
MARKING
Timing (Access/Cycle/MHz)
2.6ns/5ns/200 MHz
-5
3.5ns/6ns/166 MHz
-6
4.0ns/7.5ns/133 MHz
-7.5
5ns/10ns/100 MHz
-10
Configurations
256K x 18
MT58L256L18D1
128K x 32
MT58L128L32D1
128K x 36
MT58L128L36D1
Packages
100-pin TQFP
T
119-pin, 14mm x 22mm BGA
B
Operational Temperature Range
Commercial (0
°C to +70°C)
None
Industrial (-40
°C to +85°C)
IT
Part Number Example:
MT58L256L18D1T-6 IT
MT58L256L18D1, MT58L128L32D1,
MT58L128L36D1
3.3V VDD, 3.3V I/O, Pipelined, Double-
Cycle Deselect
119-PIN BGA
*JEDEC-standard MS-026 BHA (LQFP).
100-PIN TQFP*
4Mb SYNCBURST
SRAM
GENERAL DESCRIPTION
The Micron SyncBurst SRAM family employs
high-speed, low-power CMOS designs that are fabri-
cated using an advanced CMOS process.
Micron’s 4Mb SyncBurst SRAMs integrate a 256K x
18, 128K x 32, or 128K x 36 SRAM core with advanced
synchronous peripheral circuitry and a 2-bit burst
counter. All synchronous inputs pass through registers
controlled by a positive-edge-triggered single clock
input (CLK). The synchronous inputs include all ad-
dresses, all data inputs, active LOW chip enable (CE#),
two additional chip enables for easy depth expansion
(CE2, CE2#), burst control inputs (ADSC#, ADSP#,
ADV#), byte write enables (BWx#) and global write
(GW#).
相關(guān)PDF資料
PDF描述
MT58L128V36P1B-4 128K X 36 STANDARD SRAM, 2.3 ns, PBGA119
MT58L32L36PT-7.5 32K X 36 CACHE SRAM, 4.2 ns, PQFP100
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT58L128L36F1 制造商:MICRON 制造商全稱:Micron Technology 功能描述:4Mb: 256K x 18, 128K x 32/36 FLOW-THROUGH SYNCBURST SRAM
MT58L128L36F1T-10 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Quad 3.3V 4M-Bit 128K x 36 10ns 100-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk
MT58L128L36F1T-10 TR 制造商:Cypress Semiconductor 功能描述:128KX36 SRAM PLASTIC TQFP 3.3V
MT58L128L36F1T-8.5 制造商:Cypress Semiconductor 功能描述:128KX36 SRAM PLASTIC TQFP 3.3V 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述:
MT58L128L36F1T-8.5C 制造商:Rochester Electronics LLC 功能描述:- Bulk