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參數(shù)資料
| 型號： | MT58L128L18F |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 128K x 18, Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| 中文描述： | 128K的× 18，流量通過SyncBurst的SRAM（處理器，流通式同步脈沖靜態(tài)內(nèi)存） |
| 文件頁數(shù)： | 3/24頁 |
| 文件大?。?/td> | 459K |
| 代理商： | MT58L128L18F |
3
2Mb: 128K x 18, 64K x 32/36 Flow-Through SyncBurst SRAM
MT58L128L18F_2.p65 – Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
2Mb: 128K x 18, 64K x 32/36
FLOW-THROUGH SYNCBURST SRAM
GENERAL DESCRIPTION (continued)
two additional chip enables for easy depth expansion
(CE2, CE2#), burst control inputs (ADSC#, ADSP#,
ADV#), byte write enables (BWx#) and global write
(GW#).
Asynchronous inputs include the output enable
(OE#), snooze enable (ZZ) and clock (CLK). There is also
a burst mode pin (MODE) that selects between inter-
leaved and linear burst modes. The data-out (Q), en-
abled by OE#, is also asynchronous. WRITE cycles can
be from one to two bytes wide (x18) or from one to four
bytes wide (x32/x36), as controlled by the write control
inputs.
Burst operation can be initiated with either address
status processor (ADSP#) or address status controller
(ADSC#) input pins. Subsequent burst addresses can be
internally generated as controlled by the burst advance
pin (ADV#).
Address and write control are registered on-chip to
simplify WRITE cycles. This allows self-timed WRITE
cycles. Individual byte enables allow individual bytes
to be written.
During WRITE cycles on the x18 device, BWa#
controls DQa pins and DQPa; BWb# controls DQb pins
and DQPb. During WRITE cycles on the x32 and x36
devices, BWa# controls DQa pins and DQPa; BWb#
controls DQb pins and DQPb; BWc# controls DQc pins
and DQPc; BWd# controls DQd pins and DQPd. GW#
LOW causes all bytes to be written. Parity bits are only
available on the x18 and x36 versions.
Micron’s 2Mb SyncBurst SRAMs operate from a
+3.3V V
DD
power supply, and all inputs and outputs are
TTL-compatible. Users can choose either a 3.3V or 2.5V
I/O version. The device is ideally suited for 486,
Pentium
, 680X 0, and PowerPC systems and systems
that benefit from a very wide data bus. The device is also
ideal in generic 16-, 18-, 32-, 36-, 64-, and 72-bit-wide
Please to www.micronsemi.com/datasheets/syncds.html) for
Micron’s siteTQFP PIN ASSIGNMENT TABLE
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
x18
NC
NC
NC
x32/x36
NC/
DQPc
**
DQc
DQc
V
DD
Q
V
SS
DQc
DQc
DQc
DQc
V
SS
V
DD
Q
DQc
DQc
V
SS
V
DD
NC
V
SS
DQd
DQd
V
DD
Q
V
SS
DQd
DQd
DQd
DQd
NC
NC
DQb
DQb
DQb
DQb
DQb
DQb
DQb
DQb
DQPb
NC
PIN #
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
x18
x32/x36
PIN #
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
x18
NC
NC
NC
x32/x36
NC/
DQPa
**
DQa
DQa
V
DD
Q
V
SS
DQa
DQa
DQa
DQa
V
SS
V
DD
Q
DQa
DQa
ZZ
V
DD
NC
V
SS
DQb
DQb
V
DD
Q
V
SS
DQb
DQb
DQb
DQb
PIN #
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
x18
x32/x36
*Pin 50 is reserved for address expansion.
**No Connect (NC) is used on the x32 version. Parity (DQPx) is used on the x36 version.
V
SS
V
DD
Q
NC
NC
SA
DQb
DQb
NC/
DQPb
**
SA
SA
ADV#
ADSP#
ADSC#
OE#
BWE#
GW#
CLK
V
SS
V
DD
CE2#
BWa#
BWb#
BWc#
BWd#
CE2
CE#
SA
SA
NC
NC
V
SS
V
DD
Q
NC
NC
NC
DQd
DQd
NC/
DQPd
**
MODE
SA
SA
SA
SA
SA1
SA0
DNU
DNU
V
SS
V
DD
DNU
DNU
SA
SA
SA
SA
SA
SA
NC/
SA
*
NC
NC
DQa
DQa
DQa
DQa
DQPa
NC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT58L128V18F | 128K x 18, Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L64L32F | 64K x 32,Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L64L36F | 64K x 36,Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L128L18P | 128K x 18, Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲器) |
| MT58L128V18P | 128K x 18, Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT58L128L18F10 | 制造商:MICRON 功能描述:* |
| MT58L128L18F-10A | 制造商:Micron Technology Inc 功能描述: |
| MT58L128L18FT-10 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
| MT58L128L18FT-10A | 制造商:MAJOR 功能描述: |
| MT58L128L18FT-6.8 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
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