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參數(shù)資料
| 型號： | MT48LC8M16A2FC-7ELIT |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | SYNCHRONOUS DRAM |
| 中文描述： | 同步DRAM |
| 文件頁數(shù)： | 17/59頁 |
| 文件大?。?/td> | 1822K |
| 代理商： | MT48LC8M16A2FC-7ELIT |
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17
128Mb: x4, x8, x16 SDRAM
128MSDRAM_E.p65
–
Rev. E; Pub. 1/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
128Mb: x4, x8, x16
SDRAM
This is shown in Figure 7 for CAS latencies of two and
three; data element
n
+ 3 is either the last of a burst of four
or the last desired of a longer burst. The 128Mb SDRAM
uses a pipelined architecture and therefore does not
require the 2
n
rule associated with a prefetch architec-
Figure 7
Consecutive READ Bursts
ture. A READ command can be initiated on any clock
cycle following a previous READ command. Full-speed
random read accesses can be performed to the same
bank, as shown in Figure 8, or each subsequent READ
may be performed to a different bank.
NOTE:
Each READ command may be to any bank. DQM is LOW.
CLK
DQ
D
OUT
n
T2
T1
T4
T3
T6
T5
T0
COMMAND
ADDRESS
READ
NOP
NOP
NOP
NOP
BANK,
COL
n
NOP
BANK,
COL
b
D
OUT
n
+ 1
D
OUT
n
+ 2
D
OUT
n
+ 3
D
OUT
b
READ
X
= 1 cycle
CAS Latency = 2
CLK
DQ
D
OUT
n
T2
T1
T4
T3
T6
T5
T0
COMMAND
ADDRESS
READ
NOP
NOP
NOP
NOP
BANK,
COL
n
NOP
BANK,
COL
b
D
OUT
n
+ 1
D
OUT
n
+ 2
D
OUT
n
+ 3
D
OUT
b
READ
NOP
T7
X
= 2 cycles
CAS Latency = 3
DON
’
T CARE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT48LC8M16A2FC-8E | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:SYNCHRONOUS DRAM |
| MT48LC8M16A2FC-8EIT | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:SYNCHRONOUS DRAM |
| MT48LC8M16A2FC-8EL | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:SYNCHRONOUS DRAM |
| MT48LC8M16A2FC-8ELIT | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:SYNCHRONOUS DRAM |
| MT48LC8M16A2P-6A | 制造商:Micron Technology Inc 功能描述:SDRAM 128MBIT 167MHZ 54TSOP 制造商:Micron Technology Inc 功能描述:SDRAM, 128MBIT, 167MHZ, 54TSOP 制造商:Micron Technology Inc 功能描述:SDRAM, 128MBIT, 167MHZ, 54TSOP; Memory Type:DRAM - Synchronous; Memory Configuration:8M x 16bit; Access Time:6ns; Memory Case Style:TSOPII; No. of Pins:54; Interface Type:-; Operating Temperature Min:0C; Operating Temperature ;RoHS Compliant: Yes |
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