參數(shù)資料
型號(hào)： MSX532-TB792
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 數(shù)字信號(hào)處理外設(shè)
英文描述： DSP-CROSSBAR SWITCH, PBGA792
封裝： TBGA-792
文件頁(yè)數(shù)： 10/61頁(yè)
文件大?。?/td> 726K
代理商： MSX532-TB792
MSX Family Datasheet
18
[Rev. 1.10] 3/21/02
Fairchild Semiconductor
1.5
JTAG Interface
The dedicated JTAG TAP interface is designed in compliance with the IEEE-1149.1. The standard
interface has five pins: Test Data Out (TDO), Test Mode Select (TMS), Test Data In (TDI), Test Reset
(TRST#), and Test Clock (TCK) which allow Boundary Scan Testing as well as device configuration and
verification. Data on the TDI and TMS pins are clocked into the device on the rising edge of the TCK
signal, while the valid data appears on the TDO pin after the falling edge of TCK. For more detailed
information on JTAG programming, refer to the MSX Family Register Programming Manual.
1.5.1
IOB Programming
The JTAG IOB Data Register where data is held, is used to program the IOB. This register is used
with the JTAG interface only. The JTAG IOB Data Register is 20 bits wide. Power on reset,
RapidConfigure reset, Hardware reset, and JTAG reset programs all Ports as inputs. JTAG can be
reset via the TRST# pin or by clocking five consecutive ones to the TMS pin. The HW_RST#
(hardware reset) pin resets and breaks all connections in the Crosspoint Array to all no-connects,
and the IOBs to inputs.
Table 7 lists the bits and their function in JTAG mode. These are internal bits as shifted into the
IOB Data register for IOB Programming.
RCB[4:3]
Input Clock Source. These bits are used to select a clock source for a registered input port. Each IOB can select
from one of two global clock inputs, or can use Next Neighbor Clocking. Next Neighbor Clocking uses the
signal on the next higher numbered port as a clock source. If no clock source is assigned to an input port, it will
operate in flow-through mode.
RCB[6:5]
Function
00
No Input Clock Source Selected
01
Input Clock Source 1
10
Input Clock Source 2
11
Next Neighbor Input Clock Source
RCB[2]
Invert Output. If an output port is programmed with this bit set to a one, the output of the port will be inverted.
If this bit is zero, the output will not be inverted. Outputs may not be inverted when operating in Bus Repeater
Mode or in registered output mode.
RCB[1]
Inverted Input Clock. When this bit is set to a one, the registered input port’s selected clock source will be
inverted. When zero the input clock source will not be inverted.
RCB[0]
Inverted Output Clock. When this bit is set to a one, the registered output port’s selected clock source will be
inverted. When zero the output clock source will not be inverted.
Table 6
IOB Programming Commands (Continued)
Signal
Description
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