參數(shù)資料
型號(hào)： MSP430F5326IZQER
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： RISC MICROCONTROLLER, PBGA80
封裝： PLASTIC, BGA-80
文件頁數(shù)： 40/68頁
文件大?。?/td> 793K
代理商： MSP430F5326IZQER
PRODUCTPREVIEW
P5.0/A8/VREF+/VeREF+
P5.1/A9/VREF–/VeREF–
P5SEL.x
1
0
P5DIR.x
P5IN.x
EN
Tomodule
1
0
Frommodule
P5OUT.x
1
0
DV
SS
DV
CC
P5REN.x
PadLogic
1
P5DS.x
0:Lowdrive
1:Highdrive
D
Bus
Keeper
to/fromReference
to ADC12
INCHx=x
MSP430F532x
www.ti.com
SLAS678 – AUGUST 2010
Port P5, P5.0 and P5.1, Input/Output With Schmitt Trigger
Table 50. Port P5 (P5.0 and P5.1) Pin Functions
CONTROL BITS/SIGNALS(1)
PIN NAME (P5.x)
x
FUNCTION
P5DIR.x
P5SEL.x
REFOUT
P5.0/A8/VREF+/VeREF+
0
P5.0 (I/O)(2)
I: 0; O: 1
0
X
A8/VeREF+(3)
X
1
0
A8/VREF+(4)
X
1
P5.1/A9/VREF–/VeREF–
1
P5.1 (I/O)(2)
I: 0; O: 1
0
X
A9/VeREF– (5)
X
1
0
A9/VREF–(6)
X
1
(1)
X = Don't care
(2)
Default condition
(3)
Setting the P5SEL.0 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. An external voltage can be applied to VeREF+ and used as the reference for the ADC12_A. Channel A8, when selected
with the INCHx bits, is connected to the VREF+/VeREF+ pin.
(4)
Setting the P5SEL.0 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. The VREF+ reference is available at the pin. Channel A8, when selected with the INCHx bits, is connected to the
VREF+/VeREF+ pin.
(5)
Setting the P5SEL.1 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. An external voltage can be applied to VeREF- and used as the reference for the ADC12_A. Channel A9, when selected
with the INCHx bits, is connected to the VREF-/VeREF- pin.
(6)
Setting the P5SEL.1 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. The VREF– reference is available at the pin. Channel A9, when selected with the INCHx bits, is connected to the
VREF-/VeREF- pin.
Copyright 2010, Texas Instruments Incorporated
45
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