參數(shù)資料
型號(hào): MSP430F4793IPZ
廠商: Texas Instruments
文件頁數(shù): 30/80頁
文件大小: 0K
描述: IC MCU 16BIT 60KB FLASH 100LQFP
產(chǎn)品培訓(xùn)模塊: The Ultra-Low Power MSP430
MSP430 Overview
MSP430 Design Tools
MSP430 Peripherals
MSP430x2xx/4xx and Wireless Overview
Portable Medical Solutions with MSP430
MSP430 for Utility Metering Solutions
MSP430: How to JTAG
MSP430, How To Use the Clock System
Grace Software Graphical User Interface
MCU Overview
Driver Library
MSP430Ware Overview
標(biāo)準(zhǔn)包裝: 90
系列: MSP430x4xx
核心處理器: RISC
芯體尺寸: 16-位
速度: 16MHz
連通性: I²C,IrDA,LIN,SCI,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LCD,POR,PWM,WDT
輸入/輸出數(shù): 72
程序存儲(chǔ)器容量: 60KB(60K x 8 + 256B)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 2.5K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 3x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 管件
配用: MSP-FET430U100-ND - KIT PROG/DEBUG MSP430F 100PIN PZ
其它名稱: 296-33436-5
MSP430F4793IPZ-ND
MSP430F47x3, MSP430F47x4
MIXED SIGNAL MICROCONTROLLER
SLAS545C MAY 2007 REVISED MARCH 2011
36
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
crystal oscillator, LFXT1, low-frequency modes (see Note 4)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
fLFXT1, LF
LFXT1 oscillator crystal
frequency, LF mode
XTS_FLL = 0, LFXT1DIG = 0
1.8 V3.6 V
32, 768
Hz
fLFXT1, LF, logic
LFXT1 oscillator logic level
square-wave input frequency,
LF mode
XTS_FLL = 0, LFXT1DIG = 1,
XCAPx = 0
1.8 V3.6 V
10, 000
32, 768
Hz
OA
Oscillation allowance for LF
XTS_FLL = 0, LFXT1DIG = 0,
fLFXT1, LF = 32,768 kHz,
CL, eff = 6 pF
500
k
W
OALF
Oscillation allowance for LF
crystals
XTS_FLL = 0, LFXT1DIG = 0,
fLFXT1, LF = 32,768 kHz,
CL, eff = 12 pF
200
k
W
XTS_FLL = 0, XCAPx = 0
1
C
Integrated effective load
capacitance LF mode
XTS_FLL = 0, XCAPx = 1
5.5
pF
CL, eff
capacitance, LF mode
(see Note 1)
XTS_FLL = 0, XCAPx = 2
8.5
pF
(see Note 1)
XTS_FLL = 0, XCAPx = 3
11
Duty Cycle
LF mode
XTS_FLL = 0,
Measured at P1.4/ACLK,
fLFXT1, LF = 32, 768 Hz
2.2 V/3 V
30
50
70
%
fFault, LF
Oscillator fault frequency,
LF mode (see Note 3)
XTS_FLL = 0 (see Note 2)
2.2 V/3 V
10
10, 000
Hz
NOTES:
1. Includes parasitic bond and package capacitance (approximately 2pF per pin).
Since the PCB adds additional capacitance it is recommended to verify the correct load by measuring the ACLK frequency. For a
correct setup the effective load capacitance should always match the specification of the used crystal.
2. Measured with logic level input frequency but also applies to operation with crystals.
3. Frequencies below the MIN specification will set the fault flag, frequencies above the MAX specification will not set the fault flag.
Frequencies in between might set the flag.
4. To improve EMI on the LFXT1 oscillator the following guidelines should be observed.
Keep as short of a trace as possible between the device and the crystal.
Design a good ground plane around the oscillator pins.
Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.
Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other
documentation. This signal is no longer required for the serial programming adapter.
crystal oscillator, LFXT1, high-frequency mode
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
f
XT1 oscillator crystal frequency
XTS FLL
1 Ceramic resonator
1.8 V3.6 V
0.45
4
MHz
fXT1
XT1 oscillator crystal frequency
XTS_FLL = 1, Ceramic resonator
2.7 V3.6 V
0.45
8
MHz
f
XT1 oscillator crystal frequency
XTS FLL
1 Crystal
1.8 V3.6 V
1
4
MHz
fXT1
XT1 oscillator crystal frequency
XTS_FLL = 1, Crystal
2.7 V3.6 V
1
8
MHz
CL, eff
Integrated effective Load
Capacitance (see Note 1)
XTS_FLL = 1, XCAPx = 0
(see Note 2)
1
pF
Duty Cycle
Measured at P1.4/ACLK
2.2 V/3 V
40
50
60
%
NOTES:
1. Includes parasitic bond and package capacitance (approximately 2pF per pin).
Since the PCB adds additional capacitance it is recommended to verify the correct load by measuring the ACLK frequency. For a
correct setup the effective load capacitance should always match the specification of the used crystal.
2. Requires external capacitors at both terminals. Values are specified by crystal manufacturers.
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