- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗11734 > MSP430F4783IPZ (Texas Instruments)IC MCU 16BIT 48KB FLASH 100LQFP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | MSP430F4783IPZ |
| 寤犲晢锛� | Texas Instruments |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 5/80闋�(y猫) |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC MCU 16BIT 48KB FLASH 100LQFP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | The Ultra-Low Power MSP430 MSP430 Overview MSP430 Design Tools MSP430 Peripherals MSP430x2xx/4xx and Wireless Overview Portable Medical Solutions with MSP430 MSP430 for Utility Metering Solutions MSP430: How to JTAG MSP430, How To Use the Clock System Grace Software Graphical User Interface MCU Overview Driver Library MSP430Ware Overview |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 90 |
| 绯诲垪锛� | MSP430x4xx |
| 鏍稿績铏曠悊鍣細 | RISC |
| 鑺珨灏哄锛� | 16-浣� |
| 閫熷害锛� | 16MHz |
| 閫ｉ€氭€э細 | I²C锛孖rDA锛孡IN锛孲CI锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯(c猫)/寰�(f霉)浣�锛孡CD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 72 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 | 48KB锛�48K x 8 + 256B锛� |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 2K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 3.6 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 3x16b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 100-LQFP |
| 鍖呰锛� | 绠′欢 |
| 閰嶇敤锛� | MSP-FET430U100-ND - KIT PROG/DEBUG MSP430F 100PIN PZ |
| 鍏跺畠鍚嶇ū锛� | 296-33434-5 MSP430F4783IPZ-ND |
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MSP430F47x3, MSP430F47x4
MIXED SIGNAL MICROCONTROLLER
SLAS545C MAY 2007 REVISED MARCH 2011
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
memory organization
MSP430F4783/MSP430F4784
MSP430F4793/MSP430F4794
Memory
Main: interrupt vector
Main: code memory
Size
Flash
48KB
0FFFFh to 0FFE0h
0FFFFh to 04000h
60KB
0FFFFh to 0FFE0h
0FFFFh to 01100h
Information memory
Size
Flash
256 Byte
010FFh to 01000h
256 Byte
010FFh to 01000h
Boot memory
Size
ROM
1KB
0FFFh to 0C00h
1KB
0FFFh to 0C00h
RAM
Size
2KB
09FFh to 0200h
2.5KB
0BFFh to 0200h
Peripherals
16-bit
8-bit
8-bit SFR
01FFh to 0100h
0FFh to 010h
0Fh to 00h
01FFh to 0100h
0FFh to 010h
0Fh to 00h
bootstrap loader (BSL)
The BSL enables users to program the flash memory or RAM using a UART serial interface. Access to device
memory via the BSL is protected by user-defined password. For complete description of the features of the BSL
and its implementation, see the application report Features of the MSP430 Bootstrap Loader, literature number
SLAA089.
BSL FUNCTION
PZ PACKAGE PINS
Data transmit
87 - P1.0
Data receive
86 - P1.1
flash memory, flash
The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The
CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:
D Flash memory has n segments of main memory and four segments of information memory (A to D) of 64
bytes each. Each segment in main memory is 512 bytes in size.
D Segments 0 to n may be erased in one step, or each segment may be individually erased.
D Segments A to D can be erased individually, or as a group with segments 0 to n.
Segments A to D are also called information memory.
D Segment A might contain calibration data. After reset, segment A is protected against programming or
erasing. It can be unlocked but care should be taken not to erase this segment if the calibration data is
required.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| MS27656T17F99S | CONN RCPT 23POS WALL MNT W/SCKT |
| VI-J4B-IW-F3 | CONVERTER MOD DC/DC 95V 100W |
| VI-J4B-IW-F1 | CONVERTER MOD DC/DC 95V 100W |
| MS3116J14-19PW | CONN PLUG 19POS STRAIGHT W/PINS |
| AD9883AKSTZ-RL110 | IC INTERFACE FLAT 110MHZ 80LQFP |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| MSP430F4783IPZR | 鍔熻兘鎻忚堪:16浣嶅井鎺у埗鍣� - MCU 16B Ultra-Lo-Pwr MCU RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:RISC 铏曠悊鍣ㄧ郴鍒�:MSP430FR572x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:24 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:8 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 灏佽 / 绠遍珨:VQFN-40 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| MSP430F4784IPZ | 鍔熻兘鎻忚堪:16浣嶅井鎺у埗鍣� - MCU 16B Ultra-Lo-Pwr MCU RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:RISC 铏曠悊鍣ㄧ郴鍒�:MSP430FR572x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:24 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:8 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 灏佽 / 绠遍珨:VQFN-40 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| MSP430F4784IPZR | 鍔熻兘鎻忚堪:16浣嶅井鎺у埗鍣� - MCU 16B Ultra-Lo-Pwr MCU RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:RISC 铏曠悊鍣ㄧ郴鍒�:MSP430FR572x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:24 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:8 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 灏佽 / 绠遍珨:VQFN-40 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| MSP430F478IPN | 鍔熻兘鎻忚堪:16浣嶅井鎺у埗鍣� - MCU 16B Ultra-Lo-Pwr MCU 48KB Fl 2KB RAM RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:RISC 铏曠悊鍣ㄧ郴鍒�:MSP430FR572x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:24 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:8 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 灏佽 / 绠遍珨:VQFN-40 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| MSP430F478IPNR | 鍔熻兘鎻忚堪:16浣嶅井鎺у埗鍣� - MCU 16B Ultra-Lo-Pwr MCU 48KB Fl 2KB RAM RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:RISC 铏曠悊鍣ㄧ郴鍒�:MSP430FR572x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:24 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:8 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 灏佽 / 绠遍珨:VQFN-40 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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