參數(shù)資料
型號(hào)： MSP430F47187IPZ
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP100
封裝： GREEN, PLASTIC, QFP-100
文件頁(yè)數(shù)： 44/87頁(yè)
文件大小： 1538K
代理商： MSP430F47187IPZ
MSP430F471x3, MSP430F471x6, MSP430F471x7
MIXED SIGNAL MICROCONTROLLER
SLAS626C -- OCTOBER 2008 -- REVISED MARCH 2011
49
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
USCI (UART mode) -- recommended operating conditions
PARAMETER
CONDITIONS
MIN
MAX
UNIT
fUSCI
USCI input clock frequency
Internal: SMCLK, ACLK
External: UCLK
Duty cycle = 50% 10%
fSYSTEM
MHz
fBITCLK
BITCLK clock frequency
(equals baud rate in MBaud)
1
MHz
USCI (UART mode)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
t
UART receive deglitch time
2.2 V
50
150
600
ns
t
UART receive deglitch time
(see Note 1)
3V
50
100
600
ns
NOTES: 1. Pulses on the UART receive input (UCxRX) shorter than the UART receive deglitch time are suppressed. To ensure that pulses are
correctly recognized their width should exceed the maximum specification of the deglitch time.
USCI (SPI master mode) -- recommended operating conditions
PARAMETER
CONDITIONS
MIN
MAX
UNIT
fUSCI
USCI input clock frequency
SMCLK, ACLK
Duty cycle = 50% 10%
fSYSTEM
MHz
USCI (SPI master mode) (see Note 1, Figure 21, and Figure 22)
PARAMETER
TEST CONDITIONS
VCC
MIN
MAX
UNIT
fUSCI
USCI input clock frequency
SMCLK, ACLK
Duty cycle = 50% 10%
fSYSTEM
MHz
t
SOMI input data setup time
2.2 V
110
ns
tSU,MI
SOMI input data setup time
3V
75
ns
t
SOMI input data hold time
2.2 V
0
ns
tHD,MI
SOMI input data hold time
3V
0
ns
t
SIMO output data valid time (Note 2)
UCLK edgetoSIMOvalid,
2.2 V
30
ns
tVALID,MO
SIMO output data valid time (Note 2)
UCLK edge to SIMO valid,
CL =20pF
3V
20
ns
t
SIMO output data hold time (Note 3)
C
20 pF
2.2 V
0
ns
tHD,MO
SIMO output data hold time (Note 3)
CL =20pF
3V
0
ns
NOTES: 1.
f
UCxCLK
=
1
2t
LO∕HI
with
t
LO∕HI ≥ max(tVALID,MO(USCI) + tSU,SI(Slave), tSU,MI(USCI) + tVALID,SO(Slave)).
For the slave’s parameters tSU,SI(Slave) and tVALID,SO(Slave) refer to the SPI parameters of the attached slave.
2. Specifies the time to drive the next valid data to the SIMO output after the output changing UCLK clock edge. Refer to the timing
diagrams in Figure 21 and Figure 22.
3. Specifies how long data on the SIMO output is valid after the output changing UCLK clock edge. Negative values indicate that the
data on the SIMO output can become invalid before the output changing clock edge observed on UCLK. Refer to the timing diagrams
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MSP430F47187IPZR 功能描述:16位微控制器 - MCU 16B Ultr-Lo-Pw 116KB Fl 7 Sigma-Delta ADC RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
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MSP430F47193IPZR 功能描述:16位微控制器 - MCU 16B Ultra-Low-Pwr Microcontroller RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
MSP430F47196IPZ 功能描述:16位微控制器 - MCU 16B Ultr-Lo-Pw 120KB Fl 6 Sigma-Delta ADC RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
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