參數(shù)資料
型號: MSP430F2013IPWR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PDSO14
封裝: GREEN, PLASTIC, TSSOP-14
文件頁數(shù): 18/92頁
文件大小: 1672K
代理商: MSP430F2013IPWR
MSP430F20x3
MSP430F20x2
MSP430F20x1
SLAS491H
– AUGUST 2005 – REVISED AUGUST 2011
Outputs (Ports P1 and P2)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
I(OHmax) = -1.5 mA
(1)
2.2 V
VCC - 0.25
VCC
I(OHmax) = -6 mA
(2)
2.2 V
VCC - 0.6
VCC
VOH
High-level output voltage
V
I(OHmax) = -1.5 mA
(1)
3 V
VCC - 0.25
VCC
I(OHmax) = -6 mA
(2)
3 V
VCC - 0.6
VCC
I(OLmax) = 1.5 mA
(1)
2.2 V
VSS
VSS + 0.25
I(OLmax) = 6 mA
(2)
2.2 V
VSS
VSS + 0.6
VOL
Low-level output voltage
V
I(OLmax) = 1.5 mA
(1)
3 V
VSS
VSS + 0.25
I(OLmax) = 6 mA
(2)
3 V
VSS
VSS + 0.6
(1)
The maximum total current, I(OHmax) and I(OLmax), for all outputs combined should not exceed ±12 mA to hold the maximum voltage drop
specified.
(2)
The maximum total current, I(OHmax) and I(OLmax), for all outputs combined should not exceed ±48 mA to hold the maximum voltage drop
specified.
Output Frequency (Ports P1 and P2)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
2.2 V
10
Port output frequency
fPx.y
P1.4/SMCLK, CL = 20 pF, RL = 1 kΩ
(1) (2)
MHz
(with load)
3 V
12
2.2 V
12
fPort°CLK
Clock output frequency
P2.0/ACLK, P1.4/SMCLK, CL = 20 pF
(2)
MHz
3 V
16
(1)
A resistive divider with 2
× 0.5 kΩ between VCC and VSS is used as load. The output is connected to the center tap of the divider.
(2)
The output voltage reaches at least 10% and 90% VCC at the specified toggle frequency.
Copyright
2005–2011, Texas Instruments Incorporated
25
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