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參數(shù)資料
| 型號(hào)： | MSM85C154HVS |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | MSM83C154S Piggy Back |
| 中文描述： | MSM83C154S豬回 |
| 文件頁數(shù)： | 8/15頁 |
| 文件大?。?/td> | 107K |
| 代理商： | MSM85C154HVS |
8/15
MSM85C154HVS
Semiconductor
AC Characteristics
External program memory access AC characteristics
Parameter
Symble
Unit
Min.
45.5
2t
CLCL
-40
Max.
1000
—
1 to 22 MHz
Variable clock from
ns
ns
t
CLCL
t
LHLL
XTAL1, XTAL 2 Oscillation Cycle
ALE Signal Width
Address Setup Time
(to ALE Falling Edge)
Address Hold Time
(from ALE Falling Edge)
Instruction Data Read Time
(from ALE Falling Edge)
From ALE Falling Edge to
PSEN
Falling Edge
PSEN
Signal Width
Instruction Data Read Time
(from
PSEN
Falling Edge)
Instruction Data Hold Time
(from
PSEN
Rising Edge)
Bus Floating Time after Instruction
Data Read (from
PSEN
Rising Edge)
Instruction Data Read Time
(from Address Output)
Bus Floating Time(
PSEN
Rising
Edge from Address float)
Address Output Time from
PSEN
Rising Edge
1t
CLCL
-15
—
ns
t
AVLL
1t
CLCL
-35
—
ns
t
LLAX
—
4t
CLCL
-100
ns
t
LLPL
1t
CLCL
-30
—
ns
t
LLPL
3t
CLCL
-35
—
ns
t
PLPH
—
3t
CLCL
-45
ns
t
PLIV
0
—
ns
t
PXIX
—
1t
CLCL
-20
ns
t
PXIZ
—
5t
CLCL
-105
ns
t
AVIV
0
—
ns
t
AZPL
1t
CLCL
-20
—
ns
t
PXAV
*1
V
CC
= 4.75 to 5.25V, V
SS
= 0V, Ta = room temp
PORT 0, ALE, and
PSEN
connected with 100 pF load, other connected with 80 pF load
*1 The variable check is from 0 to 22 MHz when the external check is used.
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