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參數資料
| 型號： | MSM80C85AH |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 8-Bit CMOS Microprocessor(掉電模式,5個中斷響應,數據、地址復用,8位微處理器) |
| 中文描述： | 8位CMOS微處理器（掉電模式，5個中斷響應，數據，地址復用，8位微處理器） |
| 文件頁數： | 9/29頁 |
| 文件大?。?/td> | 210K |
| 代理商： | MSM80C85AH |
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9/29
Semiconductor
MSM80C85AHRS/GS/JS
BASIC SYSTEM TIMING
The MSM80C85AH has a multiplexed Data Bus. ALE is used as a strobe to sample the lower
8-bits of address on the Data Bus. Figure 5 shows an instruction fetch, memory read and I/O
write cycle (as would occur during processing of the OUT instruction). Note that during the I/
O write and read cycle that the I/O port address is copied on both the upper and lower half of
the address.
There are seven possible types of machine cycles. Which of these seven takes place is defined
by the status of the three status lines (IO/
M
, S
1
, S
0
) and the three control signals (
RD
,
WR
,and
INTA
). (See Table 2.) The status line can be used as advanced controls (for device selection, for
example), since they become active at the T
1
state, at the outset of each machine cycle. Control
lines
RD
and
WR
become active later, at the time when the transfer of data is to take place, so
are used as command lines.
A machine cycle normally consists of three T states, with the exception of OPCODE FETCH,
which normally has either four or six T states (unless WAIT or HOLD states are forced by the
receipt of
READY
or HOLD inputs). Any T state must be one of ten possible states, shown in
Table 3.
Memory Read
Memory Write
I/O Read
I/O Write
Acknowledge of INTR
Bus Idle
O
O
1
1
1
0
(MR)
(MW)
(IOR)
(IOW)
Opcode Fetch
0
(OF)
(INA)
(BI): DAD
ACK. OF
RST, TRAP
HALT
1
TS
1
0
1
0
1
1
1
1
0
O
1
O
1
1
0
1
1
0
O
1
O
1
1
1
0
1
TS
1
0
1
0
1
1
1
1
TS
1
1
1
1
0
1
1
IO/
M
S
1
S
0
RD
WR
INTA
Machine Cycle
Status
Control
1
1
Table 2 MSM80C85AH Machine Cycle Chart
相關PDF資料 |
PDF描述 |
|---|---|
| MSM81C55-5GS | 2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER |
| MSM81C55-5JS | 2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER |
| MSM81C55-5RS | 2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER |
| MSM81C55-5 | 2k-bit Static RAM (256 bytes) With Parallel I/O Ports And A Timer(擴展CPU的RAM、定時器和I/O口) |
| MSM82C37B-5GS | PROGRAMMABLE DMA CONTROLLER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MSM80C85AHGS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:8-Bit CMOS MICROPROCESSOR |
| MSM80C85AHJS | 制造商:ROHM Semiconductor 功能描述: |
| MSM80C85AHRS | 制造商:OK International 功能描述: 制造商:ROHM Semiconductor 功能描述:8bit,CMOS MCU 制造商:ROHM Semiconductor 功能描述:8-bit CMOS microcontroller |
| MSM80C85ARS | 制造商:OK International 功能描述: 制造商:Panasonic Industrial Company 功能描述:IC |
| MSM80C86A-10GS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:16-Bit CMOS MICROPROCESSOR |
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