參數(shù)資料
型號： MSM80C51F
廠商： OKI SEMICONDUCTOR CO., LTD.
元件分類： 8位微控制器
英文描述： CMOS 8-Bit Microcontroller
中文描述： 的CMOS 8位微控制器
文件頁數(shù)： 31/39頁
文件大?。?/td> 355K
代理商： MSM80C51F
31/38
Semiconductor
MSM80C31F/80C51F
External Data Memory Access AC Characteristics 2
(V
CC
= 2.5 to 4.0 V, V
SS
= 0 V, Ta = –40
°
C to +85
°
C; load capacitance for Port 0, ALE, and
PSEN
=
100 pF ; load capacitance for all other outputs = 80 pF)
Parameter
Symbol
Min.
—
126
43
Max.
—
—
—
Unit
XTAL1, XTAL2 Oscillation Cycle
ALE Single Width
Adderss Setup Time
(to ALE Falling Edge)
Adderss Hold Time
(from ALE Falling Edge)
RD
Single Width
WR
Single Width
RAM Data Read Time
(from
RD
Single Falling Edge)
RAM Data Read Hold Time
(from
RD
Single Rising Edge)
Data Bus Floating Time
(from
RD
Single Rising Edge)
RAM Data Read Time
(from
ALE
Single Falling Edge)
RAM Data Read Time
(from Address Output)
RD
/
WR
Output Time from
ALE Falling Edge
RD
/
WR
Output Time from
Address Output
RD
Output Time from Data Output
Time from Data Output to
WR
Rising Edge
Data Hold Time (
WR
Rising Edge)
Time from
RD
Output to
Address Float
Time from
RD
/
WR
Rising
Edge to ALE Rising Edge
t
CLCL
t
LHLL
t
AVLL
ns
ns
ns
Max.
—
—
—
Min.
62.5
2t
CLCL
– 40
1t
CLCL
– 40
t
LLAX
48
—
ns
—
1t
CLCL
– 35
12 MHz Clock
Variable Clock
See Guaranteed
Operating Range
t
RLRH
t
WLWH
t
RLDV
400
400
—
—
—
ns
ns
ns
—
—
251
6t
CLCL
– 100
6t
CLCL
– 100
—
5t
CLCL
– 165
t
RHDX
0
—
ns
—
0
t
RHDZ
—
2t
CLCL
– 70
ns
96
—
t
LLDV
—
8t
CLCL
– 150
ns
516
—
t
AVDV
—
9t
CLCL
– 165
ns
585
—
t
LLWL
150
3t
CLCL
+ 50
ns
300
3t
CLCL
– 100
t
AVWL
203
—
ns
—
4t
CLCL
– 130
t
QVWX
t
QVWH
23
433
—
—
ns
ns
—
—
1t
CLCL
– 60
7t
CLCL
– 150
t
WHQX
t
RLAZ
33
—
—
0
ns
ns
—
0
1t
CLCL
– 50
—
t
WHLH
43
1t
CLCL
+ 100
ns
183
1t
CLCL
– 40
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